C8051F340 Datasheet, PDF (260/282 Pages) List of Unclassifed Manufacturers – Full Speed USB Flash MCU Family

C8051F340/1/2/3/4/5/6/7
When T3SPLIT = ‘1’, the Timer 3 registers (TMR3H and TMR3L) act as two 8-bit counters. Each counter
counts up independently and overflows from 0xFF to 0x00. Each time a capture event is received, the con-
tents of the Timer 3 registers are latched into the Timer 3 Reload registers (TMR3RLH and TMR3RLL). A
Timer 3 interrupt is generated if enabled.
TMR3CN
TTTTTTTT
FFF 3 3R3 3
3 3 3CS3CX
HL LEP SC
E L SL
NI K
T
SYSCLK / 12
0
External Clock / 8
1
CKCON
TTTTTTSS
3 3 2 2 1 0CC
MMMMMMA A
HLHL 10
TMR3RLH ^Capture
0
1
SYSCLK
TR3
TCLK
TMR3H
To ADC
TMR3RLL ^Capture
Enable
1
TCLK _TMR3L
0
USB Start-of-Frame (SOF)
0
Low-Frequency Oscillator
Falling Edge
1
T3CSS
Figure 21.11. Timer 3 Capture Mode (T3SPLIT = ‘1’)
Interrupt
260
Rev. 0.5