C8051F340 Datasheet, PDF (225/282 Pages) List of Unclassifed Manufacturers – Full Speed USB Flash MCU Family

C8051F340/1/2/3/4/5/6/7
SFR Definition 19.2. SMOD1: UART1 Mode
R/W
MCE1
Bit7
R/W
S1PT1
Bit6
R/W
S1PT0
Bit5
R/W
PE1
Bit4
R/W
S1DL1
Bit3
R/W
S1DL0
Bit2
R/W
XBE1
Bit1
R/W
Reset Value
SBL1 00001100
Bit0
Bit
Addressable
SFR Address: 0xE5
Bit7:
Bits6–5:
Bit4:
Bits3–2:
Bit1:
Bit0:
MCE1: Multiprocessor Communication Enable.
0: RI will be activated if stop bit(s) are ‘1’.
1: RI will be activated if stop bit(s) and extra bit are ‘1’ (extra bit must be enabled using
XBE1).
Note: This function is not available when hardware parity is enabled.
S1PT[1:0]: Parity Type.
00: Odd
01: Even
10: Mark
11: Space
PE1: Parity Enable.
This bit activates hardware parity generation and checking. The parity type is selected by
bits S1PT1-0 when parity is enabled.
0: Hardware parity is disabled.
1: Hardware parity is enabled.
S1DL[1:0]: Data Length.
00: 5-bit data
01: 6-bit data
10: 7-bit data
11: 8-bit data
XBE1: Extra Bit Enable
When enabled, the value of TBX1 will be appended to the data field.
0: Extra Bit Disabled.
1: Extra Bit Enabled.
SBL1: Stop Bit Length
0: Short - Stop bit is active for one bit time.
1: Long - Stop bit is active for two bit times (data length = 6, 7, or 8 bits), or 1.5 bit times
(data length = 5 bits).
Rev. 0.5
225