C8051F340 Datasheet, PDF (123/282 Pages) List of Unclassifed Manufacturers – Full Speed USB Flash MCU Family

C8051F340/1/2/3/4/5/6/7
13.5.2. Non-multiplexed Configuration
In Non-multiplexed mode, the Data Bus and the Address Bus pins are not shared. An example of a
Non-multiplexed Configuration is shown in Figure 13.3. See Section “13.7.1. Non-multiplexed Mode” on
page 127 for more information about Non-multiplexed operation.
A[15:0]
E
M
I
D[7:0]
F
/WR
/RD
ADDRESS BUS
V_DD
(Optional)
8
DATA BUS
A[15:0]
64K X 8
SRAM
I/O[7:0]
CE
WE
OE
Figure 13.3. Non-multiplexed Configuration Example
13.6. Memory Mode Selection
The external data memory space can be configured in one of four modes, shown in Figure 13.4, based on
the EMIF Mode bits in the EMI0CF register (SFR Definition 13.2). These modes are summarized below.
More information about the different modes can be found in Section “13.7. Timing” on page 125.
EMI0CF[3:2] = 00
On-Chip XRAM
EMI0CF[3:2] = 01
0xFFFF
EMI0CF[3:2] = 10
0xFFFF
EMI0CF[3:2] = 11
0xFFFF
0xFFFF
On-Chip XRAM
On-Chip XRAM
On-Chip XRAM
Off-Chip
Memory
(No Bank Select)
Off-Chip
Memory
(Bank Select)
Off-Chip
Memory
On-Chip XRAM
On-Chip XRAM
On-Chip XRAM
On-Chip XRAM
0x0000
0x0000
0x0000
Figure 13.4. EMIF Operating Modes
0x0000
Rev. 0.5
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