ALS300 Datasheet, PDF (8/66 Pages) List of Unclassifed Manufacturers – Media Audio Controller SPEC

Avance Logic Inc.
ALS300
Read ESP-RD-STATUS8 will clear interrupt generated by the ESP for non-BX type DMA and MIDI.
Read ESP-RD-STATUS16 will clear interrupt for BX type DMA.
After CPU read the data from ESP-READ-DATA port, bit 7 of this read status port will reset to 0 (no
data) until the next read data is available and bit 7 set to 1 (data available).
ESP-READ-DATA
Read only
Bit 7..0
X
the data return by ESP
ESP-COMMAND/DATA
Write only
Bit 7..0
X
the command or data to ESP
ESP-WR-STATUS:
Read only
Bit 7
Bit 6..0
0
ESP is available for next command/data
1
ESP is busy
X
reserved (same as ESP-READ-DATA bit 6..0)
After CPU write the command/data to the ESP-COMMAND/DATA port, bit 7 of this write status will
set to 1 (busy) until the ESP processed the written command/data and waiting for the next command/data
by reset bit 7 to 0 (not busy). Any acknowledge byte must be readback before any new command is issued.
ESP will be set busy if any DMA operation is started and will be set not busy if command port is read
twice.
Interrupt Acknowledge Procedure:
1.
IO read(ESP-RD-STATUS8), clear non BX type DMA IRQ
2.
IO read(ESP-RD-STATUS16), clear BX type DMA IRQ .
3.
IO read(MIDI-DATA), clear MPU401 MIDI interrupt
4. Write RAM-CNT clear Special-MIDI type IRQ
5. No acknowledge is required for SB-Mixer IRQ.
MPU-401 MIDI Register Definition:
MIDI-STATUS
Read only
Bit 7 0
1
MIDI input data is available
no MIDI input
Bit 6 0
1
Bit 5
0
1
ready for MIDI data output or new MIDI command
MIDIOUT FIFO full or MIDIOUT FIFO not empty when MIDI_RESET (if CR3.5=0)
Special MPU401 RAM is full (if CR3.5=1)
MIDI RAM status (Effective in special MIDI mode)
Not Full
Full
Bit 5-0
reserved
MIDI-COMMAND
Write only
Bit 7..0
command to MIDI controller
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