ALS300 Datasheet, PDF (60/66 Pages) List of Unclassifed Manufacturers – Media Audio Controller SPEC

Avance Logic Inc.
ALS300
FFLP=1: read from CBC.15~8
= 000
87h IO write
write to GCR91.23~16
Always
02h IO write
FFLP=0: Write to GCR93.7~0
Always
FFLP=1: Write to GCR93.15~8
02h IO read
FFLP=0: read from CA.7~0
SBDMA
FFLP=1: read from CA.15~8
= 001
03h IO write
FFLP=0: Write to GCR94.7~0
Always
FFLP=1: Write to GCR94.15~8
03h IO read
FFLP=0: read from CBC.7~0
SBDMA
FFLP=1: read from CBC.15~8
= 001
83h IO write
write to GCR93.23~16
Always
06h IO write
FFLP=0: Write to GCR95.7~0
Always
FFLP=1: Write to GCR95.15~8
06h IO read
FFLP=0: read from CA.7~0
SBDMA
FFLP=1: read from CA.15~8
= 003
07h IO write
FFLP=0: Write to GCR96.7~0
Always
FFLP=1: Write to GCR96.15~8
07h IO read
FFLP=0: read from CBC.7~0
SBDMA
FFLP=1: read from CBC.15~8
= 003
82h IO write
write to GCR95.23~16
Always
08h IO read
Return the combined status
$$$
08h IO write
Write bit 2 to GCR98.14
Always
0Ah IO write Bit 1, Bit 0
Always
0 0 Write bit 2 to GCR98.28
0 1 Write bit 2 to GCR98.29
1 0 No action
1 1 Write bit 2 to GCR98.31
0Bh IO write Bit 1, Bit 0
Always
0 0 Write bit 5~2 to GCR92 bit 21~18
0 1 Write bit 5~2 to GCR94 bit 21~18
1 0 No action
1 1 Write bit 5~2 to GCR96 bit 21~18
0Ch IO write
Clear FFLP to 0
Always
0Dh IO write Clear FFLP,DMA group enable(GCR98.14),DMA Always
status and set mask bit (GCR98.31,29,28)
0Eh IO write
Clear mask bit (GCR98.31,29,28)
Always
0Fh IO write Write all mask bit (Write bit 3,1,0 to GCR98.31,29,28) Always
For DMA register access, ALS300 take different action for read and write operation :
Write Operation
“Snoop” it,fetch data and save to corresponding registers.
Read Operation
Controlled by GCR8C.9
When Legacy-DMA read is enabled, ALS300 will claim the read command
For DMA status read operation, ALS300 will take action depending on RETRY.
If RETRY=1, ALS300 issue PCI retry to terminate the cycle and request the
bus. When granting the bus, ALS300 issue 8237 status read cycle to get the
status. After getting the status, ALS300 combined it with current status of the
emulated DMA channel and clear RETRY. The constructed data is :
SBDMA=000
Replace 8237-Status bit 4,0 with internal status
SBDMA=001
Replace 8237-Status bit 5,1 with internal status
SBDMA=011
Replace 8237-Status bit 7,3 with internal status
If RETRY=0, ALS300 return the status. After status is read, RETRY is set
again.
For current address/byte read, ALS300 claim the command for the DMA channel
emulated only. For IO read from 87h.82h/83h, it’s not necessary to claim these
IO command.
z DDMA Mode :
60