ALS300 Datasheet, PDF (54/66 Pages) List of Unclassifed Manufacturers – Media Audio Controller SPEC

Avance Logic Inc.
ALS300
31:22
Reserved
21
R Address increment/decrement select. 0 : increment 1 : decrement
20
R Auto-initialization enable 0 : Disable 1 : Enable
19:18
R Transfer mode 01 : Write 10 : Read
17:16
Reserved
15:0
R DMA channel 1 base byte count BBC1[15..0]
nWrite transfer
ALS300 → Memory
Read transfer
ALS300 ← Memory
GCR95 Default : 00FFFFFFh DMA 3 starting address
Bit Type
Function
31:24
Reserved
23:0
R DMA channel 3 starting address SA3[23..0]
nStuff SA[31..24] with 0 when implemented.
GCR96 Default : 0000FFFFh
DMA 3 mode register and base byte count
Bit Type
Function
31:22
Reserved
21
R Address increment/decrement select. 0 : increment 1 : decrement
20
R Auto-initialization enable 0 : Disable 1 : Enable
19:18
R Transfer mode 01 : Write 10 : Read
17:16
Reserved
15:0
R DMA channel 3 base byte count BBC3[15..0]
nWrite transfer
ALS300 → Memory
Read transfer
ALS300 ← Memory
GCR97 Default XX004071h
Bit Type
Function
31:24
R PnP read port address RA[9..2], RA[1..0]=[1,1]
23:20
Reserved
19
R/W SBBASE decode control 0 : Enable 1 : Disable
18
R/W OPLBASE decode control 0 : Enable 1 : Disable
17
R/W GAMEBASE decode control 0 : Enable 1 : Disable
16
R/W MPUBASE decode control 0 : Enable 1 : Disable
15:8 R/W GAMEBASE[10..3] (Default : 40h)
7:0
R/W OPLBASE[10..3] (Default : 71h)
nWhen PnP emulation is disabled, SW can access PnP alias ports (GCR99.31~16) to configure
SB logic. The configuration process is identical to that
of PnP specification except the IO address. The new address map are :
GCR99.31~24
Write data port (A79h)
Note that there is no alias port for PnP read data port. In alias configuration process, ALS300
will not catch the data that writing to PnP registers.
—Bit 19~16 control the legacy IO
GCR98 Default B0002233h
Bit Type
Function
31
R DMA 3 mask 1 : mask DMA operation (Default : 1)
30
Reserved
29
R DMA 1 mask 1 : mask DMA operation (Default : 1)
28
R DMA 0 mask 1 : mask DMA operation (Default : 1)
27
Reserved
26:24 R/W SB DMA (PNP0-74.2~0) (Default 00)
23
R/W SB IO range check control(PNP0-31.1) 0 : Disable 1 : Enable
22
R/W OPL3 IO range check control(PNP1-31.1) 0 : Disable 1 : Enable
21
R/W Game-Port IO range check control(PNP2-31.1) 0 : Disable 1 : Enable
20
R/W MPU401 IO range check control(PNP3-31.1) 0 : Disable 1 : Enable
19
R/W SB activate (PNP0-30.0) 0 : Disable 1 : Enable
18
R/W OPL3 activate (PNP1-30.0) 0 : Disable 1 : Enable
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