LM3S2965_0711 Datasheet, PDF (76/574 Pages) List of Unclassifed Manufacturers – Microcontroller

System Control
Register 8: Run-Mode Clock Configuration (RCC), offset 0x060
This register is defined to provide source control and frequency speed.
Run-Mode Clock Configuration (RCC)
Base 0x400F.E000
Offset 0x060
Type R/W, reset 0x07AE.3AD1
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
ACG
SYSDIV
USESYSDIV reserved USEPWMDIV
PWMDIV
reserved
Type RO
RO
RO
RO
R/W
R/W
R/W
R/W
R/W
R/W
RO
R/W
R/W
R/W
R/W
RO
Reset
0
0
0
0
0
1
1
1
1
0
0
0
1
1
1
0
15
14
13
12
11
10
9
8
7
6
5
4
reserved
PWRDN reserved BYPASS reserved
XTAL
OSCSRC
Type RO
Reset
0
RO
R/W
RO
R/W
RO
R/W
R/W
R/W
R/W
R/W
R/W
0
1
1
1
0
1
0
1
1
0
1
3
2
reserved
RO
RO
0
0
1
0
IOSCDIS MOSCDIS
R/W
R/W
0
1
Bit/Field
31:28
27
Name
reserved
ACG
Type
RO
R/W
Reset
0x0
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Auto Clock Gating
This bit specifies whether the system uses the Sleep-Mode Clock
Gating Control (SCGCn) registers and Deep-Sleep-Mode Clock
Gating Control (DCGCn) registers if the controller enters a Sleep or
Deep-Sleep mode (respectively). If set, the SCGCn or DCGCn registers
are used to control the clocks distributed to the peripherals when the
controller is in a sleep mode. Otherwise, the Run-Mode Clock Gating
Control (RCGCn) registers are used when the controller enters a sleep
mode.
The RCGCn registers are always used to control the clocks in Run
mode.
This allows peripherals to consume less power when the controller is
in a sleep mode and the peripheral is unused.
76
November 30, 2007
Preliminary