LM3S2965_0711 Datasheet, PDF (116/574 Pages) List of Unclassifed Manufacturers – Microcontroller

System Control
Register 27: Software Reset Control 0 (SRCR0), offset 0x040
Writes to this register are masked by the bits in the Device Capabilities 1 (DC1) register.
Software Reset Control 0 (SRCR0)
Base 0x400F.E000
Offset 0x040
Type R/W, reset 0x00000000
31
30
29
28
27
26
reserved
Type RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
15
14
13
12
11
10
reserved
Type RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
25
CAN1
R/W
0
24
CAN0
R/W
0
9
8
RO
RO
0
0
23
22
21
reserved
RO
RO
RO
0
0
0
20
PWM
R/W
0
7
6
5
4
HIB
reserved
RO
R/W
RO
RO
0
0
0
0
19
18
17
reserved
RO
RO
RO
0
0
0
16
ADC
R/W
0
3
WDT
R/W
0
2
1
0
reserved
RO
RO
RO
0
0
0
Bit/Field
31:26
25
24
23:21
20
19:17
16
15:7
6
5:4
3
Name
reserved
CAN1
CAN0
reserved
PWM
reserved
ADC
reserved
HIB
reserved
WDT
Type
RO
R/W
R/W
RO
R/W
RO
R/W
RO
R/W
RO
R/W
Reset
0
0
0
0
0
0
0
0
0
0
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
CAN1 Reset Control
Reset control for CAN unit 1.
CAN0 Reset Control
Reset control for CAN unit 0.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
PWM Reset Control
Reset control for PWM module.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
ADC0 Reset Control
Reset control for SAR ADC module 0.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
HIB Reset Control
Reset control for the Hibernation module.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
WDT Reset Control
Reset control for Watchdog unit.
116
November 30, 2007
Preliminary