LM3S2965_0711 Datasheet, PDF (206/574 Pages) List of Unclassifed Manufacturers – Microcontroller

General-Purpose Timers
Figure 10-1. GPTM Module Block Diagram
Interrupt / Config
TimerA
Interrupt
TimerB
Interrupt
GPTMCFG
GPTMCTL
GPTMIMR
GPTMRIS
GPTMMIS
GPTMICR
TimerA Control
GPTMTAPMR
GPTMTAPR
GPTMTAMATCHR
GPTMTAILR
GPTMTAMR
TimerB Control
GPTMTBPMR
GPTMTBPR
GPTMTBMATCHR
GPTMTBILR
GPTMTBMR
System
Clock
0x0000 (Down Counter Modes)
TA Comparator
GPTMAR En
GPTMTBR En
TB Comparator
Clock / Edge
Detect
32 KHz or
Even CCP Pin
RTC Divider
Clock / Edge
Detect
Odd CCP Pin
0x0000 (Down Counter Modes)
10.2
Table 10-1. Available CCP Pins
Timer 16-Bit Up/Down Counter Even CCP Pin Odd CCP Pin
Timer 0 TimerA
CCP0
-
TimerB
-
CCP1
Timer 1 TimerA
CCP2
-
TimerB
-
CCP3
Timer 2 TimerA
CCP4
-
TimerB
-
CCP5
Timer 3 TimerA
-
-
TimerB
-
-
Functional Description
The main components of each GPTM block are two free-running 16-bit up/down counters (referred
to as TimerA and TimerB), two 16-bit match registers, two prescaler match registers, and two 16-bit
load/initialization registers and their associated control functions. The exact functionality of each
GPTM is controlled by software and configured through the register interface.
Software configures the GPTM using the GPTM Configuration (GPTMCFG) register (see page 217),
the GPTM TimerA Mode (GPTMTAMR) register (see page 218), and the GPTM TimerB Mode
(GPTMTBMR) register (see page 220). When in one of the 32-bit modes, the timer can only act as
a 32-bit timer. However, when configured in 16-bit mode, the GPTM can have its two 16-bit timers
configured in any combination of the 16-bit modes.
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November 30, 2007
Preliminary