VS1002D Datasheet, PDF (41/54 Pages) List of Unclassifed Manufacturers – MP3 AUDIO CODEC

VLSI
Solution ^y
VS1002d
VS1002D
10. VS1002D REGISTERS
10.9 A/D Modulator Registers
Reg
0xC01E
0xC01F
Type
rw
rw
Reset
0
0
Interrupt registers, prefix AD
Abbrev[bits]
Description
DIV
DATA
A/D Modulator divider.
A/D Modulator data.
Name
ADM POWERDOWN
ADM DIVIDER
AD DIV bits
Bits Description
15 1 in powerdown.
14:0 Divider.
ADM DIVIDER controls the AD converter’s sampling frequency. To gather one sample, 128 × n clock
cycles are used (n is value of AD DIV). The lowest usable value is 4, which gives a 48 kHz sample rate
when CLKI is 24.576 MHz. When ADM POWERDOWN is 1, the A/D converter is turned off.
AD DATA contains the latest decoded A/D value.
Version 1.0, 2005-04-27
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