VS1002D Datasheet, PDF (25/54 Pages) List of Unclassifed Manufacturers – MP3 AUDIO CODEC

VLSI
Solution ^y
VS1002d
VS1002D
8. FUNCTIONAL DESCRIPTION
8.5 Serial Control Interface (SCI)
The serial control interface is compatible with the SPI bus specification. Data transfers are always 16
bits. VS1002d is controlled by writing and reading the registers of the interface.
The main controls of the control interface are:
• control of the operation mode
• uploading user programs
• access to header data
• status information
• access to encoded digital data
8.6 SCI Registers
SCI registers, prefix SCI , offset 0xC000
Reg Type Reset Abbrev[bits]
Description
0x0 rw 0x800 MODE
0x1 rw 0x2C¹ STATUS
Mode control.
Status of VS1002d.
0x2 rw 0
BASS
Built-in bass enhancer.
0x3 rw 0
CLOCKF
Clock freq + doubler.
0x4 r 0
DECODE TIME Decode time in seconds.
0x5 rw 0
AUDATA
Misc. audio data.
0x6 rw 0
WRAM
RAM write.
0x7 rw 0
WRAMADDR
Base address for RAM write.
0x8 r 0
HDAT0
Stream header data 0.
0x9 r 0
HDAT1
Stream header data 1.
0xA rw 0
AIADDR
Start address of application.
0xB rw 0
VOL
Volume control.
0xC rw 0
AICTRL0
Application control register 0.
0xD rw 0
AICTRL1
Application control register 1.
0xE rw 0
AICTRL2
Application control register 2.
0xF rw 0
AICTRL3
Application control register 3.
1 _{Firmware changes the value of this register immediately to 0x28, and in less than 100 ms to 0x20.}
Version 1.0, 2005-04-27
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