VS1002D Datasheet, PDF (36/54 Pages) List of Unclassifed Manufacturers – MP3 AUDIO CODEC

VLSI
Solution ^y
VS1002d
VS1002D
9. OPERATION
9.7.3 Memory Test
Memory test mode is initialized with the 8-byte sequence 0x4D 0xEA 0x6D 0x54 0 0 0 0. After this
sequence, wait for 200000 clock cycles. The result can be read from the SCI register SCI HDAT0, and
’one’ bits are interpreted as follows:
Bit(s)
15
14..7
6
5
4
3
2
1
0
Meaning
Test finished
Unused
Mux test succeeded
Good I RAM
Good Y RAM
Good X RAM
Good I ROM
Good Y ROM
Good X ROM
Memory tests overwrite the current contents of the RAM memories.
9.7.4 SCI Test
Sci test is initialized with the 8-byte sequence 0x53 0x70 0xEE n 0 0 0 0, where n − 48 is the register
number to test. The content of the given register is read and copied to SCI HDAT0. If the register to be
tested is HDAT0, the result is copied to SCI HDAT1.
Example: if n is 48, contents of SCI register 0 (SCI MODE) is copied to SCI HDAT0.
Version 1.0, 2005-04-27
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