VS1002D Datasheet, PDF (19/54 Pages) List of Unclassifed Manufacturers – MP3 AUDIO CODEC

VLSI
Solution ^y
VS1002d
VS1002D
7. SPI BUSES
7.5.2 SCI Read
VS1002d registers are read by the following sequence, as shown in Figure 6. First, XCS line is pulled
low to select the device. Then the READ opcode (0x3) is transmitted via the SI line followed by an 8-bit
word address. After the address has been read in, any further data on SI is ignored. The 16-bit data
corresponding to the received address will be shifted out onto the SO line.
XCS should be driven high after data has been shifted out.
XCS
SCK
SI
SO
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
30 31
3210
000000110000
don’t care
don’t care
instruction (read)
0000000000
address
data out
15 14
000000
10
X
Figure 6: SCI Word Read
7.5.3 SCI Write
VS1002d registers are written to using the following sequence, as shown in Figure 7. First, XCS line is
pulled low to select the device. Then the WRITE opcode (0x2) is transmitted via the SI line followed by
an 8-bit word address.
After the word has been shifted in and the last clock has been sent, XCS should be pulled high to end the
WRITE sequence.
XCS
SCK
SI
SO
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
30 31
3 2 1 0 15 14
000000100000
10
X
instruction (write)
address
data out
0000000000000000 00
0 0X
Figure 7: SCI Word Write
Version 1.0, 2005-04-27
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