TMC428_06 Datasheet, PDF (35/58 Pages) List of Unclassifed Manufacturers – Intelligent Triple Stepper Motor Controller with Serial Peripheral Interfaces

TMC428 DATASHEET (v. 2.02 / April 26^th, 2006)
35
10 RAM Address Partitioning and Data Organization
The on-chip RAM capacity is 128 x 6 bit. These 128 on-chip RAM cells of 6 bit width are addressed via
64 addresses of 2 x 6 bit (see Table 10-1). So, from the point of view of addressing the on-chip RAM
via datagrams, the address space enfolds 64 addresses of 24 bit wide data, where only 2 x 6 = 12 bits
are relevant. These 64 addresses are partitioned– selected by the RRS (Register RAM Select,
datagram bit 31)– into two address ranges of 32 addresses. The registers of the TMC428 are
addressed with RRS=’0’. The on-chip RAM is addressed with RRS=’1’. The 64 on-chip RAM
addresses are partitioned into two separate ranges by the most significant address bit of the datagram
(bit 30).
The first 32 addresses are provided for the configuration of the serial stepper motor driver chain. Each
of these 32 addresses stores two configuration words, composed of the so called NxM (Next Motor) bit
together with the 5 bit wide primary signal code. While sending a datagram, the primary signal code
words are read internally beginning with the first address of the driver chain datagram configuration
memory range. Each primary signal code word selects a signal provided by the micro step unit. If the
NxM bit is ‘1’ an internal stepper motor addressing counter is incremented. If this internal counter is
equivalent to the LSMD (last stepper motor driver) parameter, the datagram transmission is finished
and the counter is preset to %00 for the next datagram transmission to the stepper motor driver chain.
The second 32 addresses are provided to store the micro step table, which usually is a quarter sine
wave period as a basic approach or the quarter period of a periodic function optimized for
microstepping of a given stepper motor type. Different stepper motors may step with different micro
step resolutions, but the micro step look up table (LUT) is the same for all stepper motors controlled by
one TMC428. Any quarter wave period stored in the micro step table is expanded automatically to a full
period wave together with its 90° phase shifted wave.
32 bit DATAGRAM sent from a µC to the TMC428 via pin SDI_C
33222222222211111111119876543210
1098765432109876543210
ADDRESS
32 x (2x6 bit)
DATA
data @ odd RAM
addresses
data @ even
RAM addresses
driver chain
1 0 datagram
configuration
range
signal_codes
signal_codes
32 x (2x6 bit)
11
quarter
period sine
wave LUT
range
quarter sine wave
values
(amplitude)
quarter sine wave
values
(amplitude)
Table 10-1: Partitioning of the on-chip RAM address space
Copyright © 2004-2006, TRINAMIC Motion Control GmbH & Co. KG