TMC428_06 Datasheet, PDF (31/58 Pages) List of Unclassifed Manufacturers – Intelligent Triple Stepper Motor Controller with Serial Peripheral Interfaces

TMC428 DATASHEET (v. 2.02 / April 26^th, 2006)
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clk2_div. With clk2_div = 7 the clock frequency of SCK_S is at maximum. A value of clk2_div = 7 is
sufficient for the drivers TMC236 / TMC239 / TMC246 / TMC249.
Note: For most applications, a setting of clk2_div = 7 is recommended.
For smooth motion even at high step frequencies the frequency f_sck_s[Hz] of the clock signal
SCK_S should be as high as possible that is compatible with the used drivers. The frequency
f_sck_s[Hz] of SCK_S does not become higher for clk2_div < 7, but the signal SCK_S becomes
asymmetric with respect to its duty cycle. An asymmetric duty cycle may cause malfunction of stepper
motor drivers, where stepper motor driver chips may work correctly in particular at low clock
frequencies of CLK. So, the range of clk2_div is {7, 8, 9, . . ., 253, 254, 255}.
The default value after power-on reset is clk2_div = 15. The clock frequency f_sck_s[Hz] of SCK_S
should be set as high as possible by choosing the parameter clk2_div in consideration of the data
clock frequency limit defined by the slowest stepper motor driver chip of the daisy chain. If step
frequencies reach the order of magnitude of the maximum datagram frequency– determined by the
clock frequency of SCK_S and by the datagram length –the step frequencies may jitter, which is an
inherent property of that serial communication. Up to which level variations of step frequencies are
acceptable depends on the application. Using microstepping driver chips– as provided by TMC236 /
TMC239 / TMC246 / TMC249 driver chips –avoids this problem.
The datagram frequency is f_datagram[Hz] = f_sck_s[Hz] / ( 1 + datagram_length[bit] + 1). This
formula is an approximation for the upper limit. For clk2_div = 7 the processing of the NxM bit requires
1 SPI clock cycle, where the processing of the NxM bit requires 1.5 SPI clock cycles for clk2_div > 7.
So, for a chain of three drivers with 12 bit datagram length each, the upper limit of the datagram
frequency is f_datagram[Hz] = f_sck_s[Hz] / ( 1 + 3*(12+1) + 1) = f_sck_s[Hz] / 41.
The TMC428 sends datagrams to the stepper motor driver chain on demand only. No datagrams are
send if continuous_update is ‘0’ during rest periods. This reduces the communication traffic. The
multiplexed reference switch inputs are processed while datagrams are sent to the stepper motor
driver chain only. If reference switches are configured to stop associated stepper motors automatically,
the configuration bit continuous_update must be set to ‘1’ to force periodic sending of datagrams to
the stepper motor driver chain and to sample the reference switches periodically, if all stepper motors
are at rest. With this, a stepper motor restarts if its associated reference switch becomes inactive.
Without continuous update, a stepper motor stopped by a reference switch would stay at rest until a
datagram is sent to the stepper motor driver chain, if its reference switch is inactive. Then, the relevant
stepper motor can be moved into the direction opposite to the reference switch or it can be moved in
both directions by disabling the automatic stop function. The continuous update datagram frequency is
f_cupd_s[Hz] = f_clk[Hz] * ( 1 / 2^ramp_div_0 + 1 / 2^ramp_div_1 + 1 / 2^ramp_div_2 ) / 32768
where ramp_div_0, ramp_div_1, ramp_div_2 are the ramp_div settings of the three stepper motors.
The bit continuous_update is also important for the automatic coil current scaling (see page 18). This
bit must be set to ‘1’ to be sure that the coil current is also scaled if all motors are at rest.
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