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TMC428_06 Datasheet, PDF (12/58 Pages) List of Unclassifed Manufacturers – Intelligent Triple Stepper Motor Controller with Serial Peripheral Interfaces
TMC428 DATASHEET (v. 2.02 / April 26th, 2006)
12
32 bit DATAGRAM sent back from the TMC428 to µC via pin SDO_C
33222222222211111111119876543210
1098765432109876543210
STATUS BITS
DATA BITS
SM3 SM2 SM1
Table 6-4: 32 bit DATAGRAM structure received by µC (MSB received first)
The status bit INT is the internal high active interrupt controller status output signal. Handling of
interrupt conditions without using interrupt techniques is possible by polling this status bit. The interrupt
signal is also directly available at the SDO_C pin of the TMC428 if nSCS_C is high. The pin SDO_C
may directly be connected to an interrupt input of the microcontroller. Since the SDO_C / nINT output
is multiplexed, the microcontroller has to disable its interrupt input while it sends a datagram to the
TMC428, because the SDO_C signal– driven by the TMC428 –alternates during datagram
transmission. For initialization purposes, the TMC428 enables direct communication between the
microcontroller and the stepper motor driver chain by sending a so called cover datagram (see
sections 9.2 and 9.3). The position cover_position and actual length cover_len of a cover datagram
is specified by writing them into a common register. Writing an up to 24 bit wide cover datagram to the
register cover_datagram will fade in that cover datagram into the next datagram sent to the stepper
motor driver chain. As a default setting, the TMC428 only sends datagrams on demand. Optionally,
continuous update– periodic sending of datagrams to the stepper motor driver chain –is also possible.
So, the status bit named CDGW (cover datagram waiting) is a handshake signal for the microcontroller
in regard to the datagram covering mechanism. This feature is necessary to enable direct data
transmission from a microcontroller to the stepper motor driver chips for initialization purposes. The
CDGW status bit also gives the status of the datagram_high_word and datagram_low_word (see
section 9.1).
The status bits RS3, RS2, RS1 represent the settings of the reference switches. But, the reference
switch inputs REF3, REF2, REF1 are not mapped directly to these status bits. Rather, the reference
switch inputs may have different functions, depending on programming (see pages 22 - 24). The three
status bits xEQt3, xEQt2, xEQt1 indicate individually for each stepper motor, if it has reached its target
position. The status bits RS3, RS2, RS1 and bits xEQt3, xEQt2, xEQt1 can trigger an interrupt or
enable simple polling techniques.
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