VS1001K Datasheet, PDF (31/40 Pages) List of Unclassifed Manufacturers – MPEG AUDIO CODEC

VLSI
Solution ^y
DATASHEET
VS1001K
7. OPERATION
7.8.1 Memory Test
Memory test mode is initialized with the 8-byte sequence 0x4D 0xEA 0x6D 0x54 0 0 0 0. After this
command (and its required 4 zeros), wait for 500000 clock cycles. The result can be read from the SCI
register HDAT0, and ’one’ bits are interpreted as follows:
Bit(s)
0
1
2
3
4
5
6
7
Meaning
Good X ROM
Good Y ROM (high)
Good Y ROM (low)
Good Y RAM
Good X RAM
Good Instruction RAM (high)
Good Instruction RAM (low)
Unused
All tests are non-destructive and interrupts are disabled during testing. Thus, no user software or data is
harmed by the tests.
Instruction ROM cannot be tested with software.
7.8.2 SCI Test
Sci test is initialized with the 8-byte sequence 0x53 0x70 0xEE n 0 0 0 0, where n − 48 is the register
number to test. The content of the given register is read and copied to HDAT0. If the register to be tested
is HDAT0, the result is copied to HDAT1.
Example: if n is 48, contents of SCI register 0 (MODE) is copied to HDAT0.
Version 4.14, 2004-02-10
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