VS1001K Datasheet, PDF (22/40 Pages) List of Unclassifed Manufacturers – MPEG AUDIO CODEC

VLSI
Solution ^y
DATASHEET
VS1001K
6. FUNCTIONAL DESCRIPTION
6.3 Serial Data Interface (SDI)
The serial data interface is meant for transferring compressed MPEG audio data.
Also several different tests may be activated through SDI as described in Chapter 7.
6.4 Serial Control Interface (SCI)
The serial control interface is compatible with the SPI bus specification. Data transfers are always 16-
bits. The VS1001k is controlled by writing and reading the registers of the interface.
The main controls of the control interface are:
• control of the operation mode
• uploading user programs
• access to header data
• status information
• access to decoded digital data
• feeding input data
6.5 SCI Registers
Name
MODE
STATUS
INT FCTLH
CLOCKF
DECODE TIME
AUDATA
WRAM
WRAMADDR
HDAT0
HDAT1
AIADDR
VOL
RESERVED
AICTRL[x]
Type
RW
RW
-
RW
R
R
W
W
R
R
RW
RW
-
RW
addr
0
1
2
3
4
5
6
7
8
9
10
11
12
13+x
Function
mode control
status of VS1001k
internal register, never use
clock freq + doubler
decode time in seconds
misc. audio data
RAM write program
base address for
RAM write
read header data
read header data
start address of
application
volume control
reserved for VS1002 use, don’t touch
2 application control
registers
x = [0 .. 1]
All registers are filled with zeros at hardware reset.
Version 4.14, 2004-02-10
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