VS1001K Datasheet, PDF (12/40 Pages) List of Unclassifed Manufacturers – MPEG AUDIO CODEC

VLSI
Solution ^y
VS1001K
DATASHEET
3. PACKAGES AND PIN DESCRIPTIONS
3.2 BGA-49
A1 BALL PAD CORNER
1 2345 67
A
B
C
D
E
F
G
1.10 REF
0.80 TYP
4.80
7.00
TOP VIEW
Figure 2: Pin Configuration, BGA-49.
Pin Name
Ball
BSYNC
E3
DVDD1
F3
DGND1
F4
XTAL0
G3
XTALI
E4
DVDD2
F5
DGND2
F6
XCS
G6
SCLK
D6
SI
E7
SO
D5
TEST0
C6
TEST1
C7
TEST2
B6
AGND1
C5
AVDD1
B5
RIGHT
A6
AGND34
B4
GBGND
A5
GBUF
C4
GBVDD
A4
RCAP
B3
AVDD45
A3
LEFT
B2
AGND56
A2
XRESET
B1
DGND3
D2
DVDD3
D3
DREQ
E2
DCLK
E1
SDATA
F2
Pin Type
DI
PWR
PWR
CLK
CLK
PWR
PWR
DI
DI
DI
DO3
DI
DO
DO
PWR
PWR
AO
PWR
PWR
AO
PWR
AIO
PWR
AO
PWR
DI
PWR
PWR
DO
DIO
DI
Function
byte synchronization signal
digital power supply
digital ground
crystal output
crystal input
digital power supply
digital ground
chip select input (active low)
clock for serial bus
serial input
serial output
reserved for test, connect to DVDD
reserved for test, do not connect!
reserved for test, do not connect!
analog ground
analog power supply
right channel output
analog ground
analog ground for ground buffer
ground buffer
analog power supply for ground buffer
filtering capacitance for reference
analog power supply
left channel output
analog ground
active low asynchronous reset
digital ground
digital power supply
data request, input bus
serial input data bus clock
serial data input
Not connected are: A1, A7, B7, C1, C2, C3, D1, D4, D7, E5, E6, F1, F7, G1, G2, G4, G5 and G7. For
“Pin Types”, see Chapter 3.1. BGA-49 package dimensions are at http://www.vlsi.fi/vs1001/bga49.pdf .
Version 4.14, 2004-02-10
12