W3100A Datasheet, PDF (29/63 Pages) List of Unclassifed Manufacturers – i2Chip W3100A

TCP Transmission Memory Size Set-up
W3100A transmission memory is comprised of 8KB in total, and the size can be assigned for each channel
through TMSR register. An example of TMSR and each memory size is illustrated in the diagram below.
When the memory size from channel 0 exceeds 8KB, all ensuing memory is ignored.
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CH3
0x2000
0x1800
CH2
0x1000
CH1
0x0800
CH0
0x0000
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TMSR <= 0x55
CH3
0x2000
0x1000
CH2
CH1
CH0
0x0800
0x0400
0x0000
1KB, 1KB, 2KB, 4KB allocated
TMSR <= 0x90
0x2000
CH0
0x1000
0x0000
8KB allocated at channel 0
TMSR <= 0x03
Remaining channels are not used
TCP Data Transmission Process
TCP starting point
ESTABLISHED
Cx_TW_PR = A
Cx_TA_PR = A
TCP send
cal FBS(free
buffer size)
FBS <=
Cx_TW_PR -
Cx_TA_PR
No
FBS >
SDS(send
data size)
Yes
Yes
Send bit == check previous
'1'
send comand
write data from
Cx_TW_PR
No
write data
Cx_TW_PR <=
Cx_TW_PR + SDS
update Cx_TW_PR
send command
In order to execute W3100A TCP transmission, 4Byte pointer of Cx_TW_PR (Tx Write Pointer Register of
Channel x) and Cx_TA_PR (Tx Ack Pointer Register of Channel x) is used. Cx_TW_PR is the pointer that
writes the data to be transmitted from MCU, and Cx_TA_PR is the pointer that completed W3100A
transmission. Cx_TW_PR and Cx_TA_PR become equal after connection set-up is made. In active open,
they are equally initialized under the sock_init command from MCU. In passive open, one is initialized by
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