W3100A Datasheet, PDF (16/63 Pages) List of Unclassifed Manufacturers – i2Chip W3100A

AUTO_INC (auto-increment) bit automatically increases the address during an access to indirect data
register.
7
6
5
4
3
2
1
0
IND_EN
L/B
AUTO_INC
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Symbol
Description
IND_EN
Indirect bus I/F mode Enable.
Reserved
Reserved
Reserved
Reserved
Reserved
L/B
Little-endian/Big-endian ordering setting register.
AUTO_INC Address auto-increment Enable
IDM_AR0, IDM_AR1 (InDirect Mode Address Register) [R/W, 0x0D – 0x0E]
This register is for address set-up when indirect bus I/F mode is in use, and the ordering changes according to
the L/B bit set-up of IM_OPT register.
When L/B bit of IDM_OPT register = ‘0’
MSB
LSB
IDM_ADDR0(0x0D)
IDM_ADDR1(0x0E)
When L/B bit of IDM_OPT register = ‘1’
LSB
MSB
IDM_ADDR0(0x0D)
IDM_ADDR1(0x0E)
IDM_DR (Indirect Mode Data Register) [R/W, 0x0F]
This register is for data when indirect bus I/F mode is in use.
2. System Registers
GAR (Gateway Address Register) [R/W, 0x80 – 0x83]
This register sets up the default gateway address to be used in the system, which is required to be set IP
address before executing Sys_Init command.
SMR (Subnet Mask Register) [R/W, 0x84 – 0x87]
This register sets up the subnet mask to be used in the system, which is required to be set up before executing
Sys_Init command.
oˆ™‹ž™Œ‹Gp•›Œ™•Œ›Gj–••ŒŠ›› G~¡ˆ™‹GO~p•Œ›SGp•ŠUPG
X]