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| W3100A Datasheet, PDF (18/63 Pages) List of Unclassifed Manufacturers – i2Chip W3100A | |||
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TMSR (Tx data Memory Size Register) [R/W, 0x96]
This register allocates 8KB of transmitted memory for each channel.
CH3
S1
S0
CH2
S1
S0
CH1
S1
S0
CH0
S1
S0
S1 S0 Memory size
0
0
1KB
0
1
2KB
1
0
4KB
1
1
8KB
2 bits of S1,S0 are allocated for each channel, and the memory for sending is allocated according to the set-
up value as shown in the table above.
3. Pointer Registers
In order to read pointer registers, the shadow register of the corresponding pointer needs to be read and time
delay of Tx_CLK * 4 is required before reading the corresponding pointer register. (Access by W3100 MCU
I/F is based on 1Byte unit, but the pointer register is comprised of 4Bytes. Therefore, shadow register is used
in order for MCU to properly read 4Byte pointer.)
To write, no access to the shadow register or time delay is necessary.
Shadow Registers Address Applicable Pointer Registers
C0_SRW_PR
0x1E0
C0_ RW_PR
C0_SRR_PR
0x1E1
C0_ RR_PR
C0_STA_PR
0x1E2
C0_ TA_PR
C1_SRW_PR
0x1E3
C1_ RW_PR
C1_SRR_PR
0x1E4
C1_ RR_PR
C1_STA_PR
0x1E5
C1_ TA_PR
C2_SRW_PR
0x1E6
C2_ RW_PR
C2_SRR_PR
0x1E7
C2_ RR_PR
C2_STA_PR
0x1E8
C2_ TA_PR
C3_SRW_PR
0x1E9
C3_ RW_PR
C3_SRR_PR
0x1EA
C3_ RR_PR
C3_STA_PR
0x1EB
C3_ TA_PR
C0_STW_PR
0x1F0
C0_ TW_PR
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