W3100A Datasheet, PDF (1/63 Pages) List of Unclassifed Manufacturers – i2Chip W3100A

www.i2Chip.com
i2Chip W3100A
Technical Datasheet v1.1
Description
The i2Chip W3100A is an LSI of hardware
protocol stack that provides an easy, low-cost solution
for high^D-s^ep^see^cd^rIⁱn^pte^trⁱn^oeⁿt connectivity for digital devices
by allow^Fi^en^ag ^ts^uim^rp^el^se installation of TCP/IP stack in the
hardwa^Bre.^{lock Diagram}
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The W3100A offers system designers a quick,
easy way to add Ethernet networking functionality to
any product. Implementing this LSI into a system
can completely offload Internet connectivity and
processing standard protocols from the system,
thereby significantly reducing the software
development cost.
The W3100A contains TCP/IP Protocol Stacks
such as TCP, UDP, IP, ARP and ICMP protocols, as
well as Ethernet protocols such as Data Link Control
and MAC protocol.
The W3100A offers a socket API (Application
Programming Interface) that is similar to the windows
socket API. The chip offers Intel and Motorola
MCU (8051, i386, 6811 tested) bus interface and I²C
for upper-layer and supports standard MII interface for
under-layer Ethernet.
The W3100A can be applied to handheld devices
including Internet phones, VoIP SOC chips, Internet
MP3 players, handheld medical devices, LAN cards
for Web servers, cellular phones and many other non-
portable electronic devices such as large consumer
electronic products.G
Features
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6/Hardware Internet protocols included:
TCP, IP Ver.4, UDP, ICMP, ARP
6/Hardware Ethernet protocols included:
DLC, MAC
6/Supports 4 independent connections simultaneously
6/Internal ICMP responds to PING commands
6/Protocol processing speed: full-duplex 4~5 Mbps
6/Intel/Motorola MCU bus Interface
6/I²C Interface
6/Standard MII Interface for under-layer physical chip
6/Socket API support for easy application programming
6/Supports full-duplex mode
6/Internal 16Kbytes Dual-port SRAM for data buffer
6/0.35 µm CMOS technology
6/Wide operating voltage:
3.3V internal operation, 5V tolerant 3.3V IOs
6/Small 64 Pin LQFP Package
Block Diagram
MODE0
MODE1
MODE2
/CS
/WR
/RD
/INT
ADDR(14:0)
DATA(7:0)
SCL
SDA
Protocol Engine
ICMP
TCP
UDP
IP
DLC
MAC
ARP
CLOCK
EX T_CL K
RESET
MII Interface
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