CH1005C Datasheet, PDF (25/49 Pages) List of Unclassifed Manufacturers – Digital PC to TV Encoder with Macrovision

CHRONTEL
CH7005C
Transfer Protocol
Both read and write cycles can be executed in “Alternating” and “Auto-increment” modes. Alternating mode
expects a register address prior to each read or write from that location (i.e., transfers alternate between address and
data). Auto-increment mode allows you to establish the initial register location, then automatically increments the
register address after each subsequent data access (i.e., transfers will be address, data data data...). A basic serial port
transfer protocol is shown in Figure 20 and described below.
SD
I²C
SC
CH7
8
9
1-8
9
Start
Condition
Device ID
R/W* ACK
CH7005
acknowledge
Data₁
ACK
CH7005
acknowledge
1-8
9
Data _n
ACK
CH7005
acknowledge
Stop
Condition
Figure 20: Serial Port Transfer Protocol
1. The transfer sequence is initiated when a high-to-low transition of SD occurs while SC is high; this is the
“START” condition. Transitions of address and data bits can only occur while SC is low.
2. The transfer sequence is terminated when a low-to-high transition of SD occurs while SC is high; this is the
“STOP” condition.
3. Upon receiving the first START condition, the CH7005 expects a Device Address Byte (DAB) from the
master device. The value of the device address is shown in the DAB data format below.
4. After the DAB is received, the CH7005 expects a Register Address Byte (RAB) from the master. The
format of the RAB is shown in the RAB data format below (note that B7 is not used).
Device Address Byte (DAB)
B7
B6
B5
B4
B3
B2
B1
B0
1
1
1
0
1
0
1
R/W
R/W
Read/Write Indicator
“0”: master device will write to the CH7005 at the register location specified by the address
AR[5:0]
“1”: master device will read from the CH7005 at the register location specified by the
address AR[5:0].
Register Address Byte (RAB)
B7
B6
B5
B4
B3
B2
B1
B0
1
AutoInc
AR[5]
AR[4]
AR[3]
AR[2]
AR[1]
AR[0]
201-0000-025 Rev 2.1, 8/2/99
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