82C862 Datasheet, PDF (25/51 Pages) List of Unclassifed Manufacturers – FireLink USB Dual Controller Quad Port USB

FireLink USB
82C862
4.6 General Purpose Pins
The strap pins TEST0, TEST1, CLKRUN#, PME#, and SMI# are multifunction pins that offer general purpose I/O (GPIO)
functionality.
At reset time these pins are always input pins. After being sampled at reset to determine strap selections for the chip logic,
these pins can be programmatically selected to be GPIO signals. TEST0 and TEST1 are automatically available as GPIO pins
after reset is de-asserted, since they have no other assigned functions. The other pins must be specifically enabled for GPIO if
their primary function assignment is not needed. The PIO mapping is as follows.
Signal
TEST0
TEST1
CLKRUN#
PME#
SMI#
PIO signal mapped to
PIO0
PIO1
PIO2
PIO3
PIO4
Refer to PCICFG 53h, 54h, and 55h for information on selection and direction of PIO pins. Note that PIO pins can be used
along with host CPU software to generate I2C interface signaling; contact OPTi for details or sample code.
912-2000-030
Revision 1.0
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