CT8022 Datasheet, PDF (170/194 Pages) List of Unclassifed Manufacturers – VOIP/VON G.723.1, G279AB TRUESPEECH CO-PROCESSOR

TrueSpeech® Co-Processor
11.2 Long Frame Sync
PRELIMINARY/CONFIDENTIAL
Version: 1.18
SCLK
FSYNC
DR0,DR1
DX0,DX1
t1
t3
1
2
3
4
5
6
7
8
t2
Bit 7
t9
7
t8
Bit 6 Bit 5 Bit 4
t5
Bit 6 Bit 5 Bit 4
t4
Bit 3 Bit 2
t6
Bit 3 Bit 2
Bit 1
Bit 1
Bit 0
Bit 0
t7
Parameter
t1
t2
t3
t4
t5
t6
t7
t8
t9
Description
Output delay from rising edge of
SCLK to rising edge of FSYNC
(master mode only)
FSYNC setup time before falling
edge of SCLK (slave mode only)
FSYNC hold time after falling edge
of SCLK.
(slave mode only)
SCLK rising edge to data output
valid
data in setup prior to falling edge of
SCLK
data in hold time after falling edge
of SCLK
data out tri-state after final falling
edge of SCLK
FSYNC width
master mode
slave mode
Min
0 ns
50 ns
100 ns
0 ns
30 ns
30 ns
0.25 * SCLKPERIOD
(122 ns at 2.048 MHz)
1 SCLK period
ms data bit valid from rising edge of
FSYNC. (slave mode only - output
enable delay from FSYNC)
SCLK duty cycle
0 ns
45%
Max
50 ns
30 ns
0.5 * SCLKPERIOD
(244 ns at 2.048 MHz)
8 SCLK periods in 8-bit
mode (nominal).
16 SCLK periods in 16-
bit mode (nominal).
30 ns
55%
170
DSP GROUP, INC., 3120 SCOTT BOULEVARD
CT8022A11AQC FW Revision 0118
SANTA CLARA, CA 95054 PH: 408 986 – 4300 FAX: 408 986 – 4490
All specifications are subject to change without prior notice.