CT8022 Datasheet, PDF (120/194 Pages) List of Unclassifed Manufacturers – VOIP/VON G.723.1, G279AB TRUESPEECH CO-PROCESSOR

TrueSpeech® Co-Processor
PRELIMINARY/CONFIDENTIAL
Version: 1.18
9.16.2 Frame Interrupt via Aux Software Status Register
It is possible to program the CT8022 to generate a frame interrupt every N frames via the Aux Software Status
Register (ASSR).
Set ASSR update rate:
Command C1 = 5145H
Status S1 = 5145H
Command C2 = N (update ASSR every N frames)
Status S2 = N
If RECORD or PLAYBACK is active, the CT8022 will write its internal frame count to the ASSR every N frames.
The Host can then program the CT8022 Hardware Control Register to generate an interrupt on the Aux Status Ready
condition. The Host clears the interrupt by reading the ASSR. Setting N to zero disables update of the ASSR. This
is the default setting.
The Host can also read the current value of the internal frame count at any time using the command:
Read Frame Count:
Command
Status
= 5144H
= current frame count.
This frame count is incremented every frame period (30ms) if either RECORD or PLAYBACK is active.
The frame counter is cleared on entry to either RECORD or PLAYBACK from IDLE mode.
9.17 Device Self-Test
9.17.1 Check Internal Program ROM Integrity
Command = 3000H:
0011
00
00 0000 000
0
(15-12)
(11-10)
(9-1)
(0)
Status:
0011
(15-12)
X
DATA ROM STATUS PROGRAM ROM STATUS
(11)
(10)
(9)
X XXXX XXXX
(8-0)
PROGRAM ROM STATUS:
DATA ROM STATUS:
X:
Set to 0 to indicate internal program ROM checksum is valid.
Set to 1 to indicate internal program ROM failure.
Set to 0 to indicate internal data ROM checksum is valid.
Set to 1 to indicate internal data ROM failure.
Reserved bits
120
DSP GROUP, INC., 3120 SCOTT BOULEVARD
CT8022A11AQC FW Revision 0118
SANTA CLARA, CA 95054 PH: 408 986 – 4300 FAX: 408 986 – 4490
All specifications are subject to change without prior notice.