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MC3510 Datasheet, PDF (17/75 Pages) List of Unclassifed Manufacturers – Pilot Motion Processor
Timing Interval
Tn
Minimum
Maximum
~HostSlct Setup Time
T7
HostCmd Setup Time
T8
HostCmd Hold Time
T9
Read Data Access Time
T10
Read Data Hold Time
T11
~HostRead High to HI-Z Time
T12
HostRdy Delay Time
T13
~HostWrite Pulse Width
T14
Write Data Delay Time
T15
Write Data Hold Time
T16
Read Recovery Time (note 2)
T17
Write Recovery Time (note 2)
T18
Read Pulse Width
T19
Address Setup Delay Time
T20
Data Access Time
T21
Data Hold Time
T22
Address Setup Delay Time
T23
Address Setup to WriteEnable High T24
RAMSlct Low to WriteEnable High
T25
Address Hold Time
T26
WriteEnable Pulse Width
T27
Data Setup Time
T28
Data Setup before Write High Time
T29
Address Setup Delay Time
T30
Data Access Time
T31
Data Hold Time
T32
Address Setup Delay Time
T33
Address Setup to WriteEnable High T34
PeriphSlct Low to WriteEnable High T35
Address Hold Time
T36
WriteEnable Pulse Width
T37
Data Setup Time
T38
Data Setup before Write High Time
T39
Read to Write Delay Time
T40
Reset Low Pulse Width
T50
RAMSlct Low to Strobe Low
T51
Strobe High to RAMSlct High
T52
WriteEnable Low to Strobe Low
T53
Strobe High to WriteEnable High
T54
PeriphSlct Low to Strobe Low
T55
Strobe High to PeriphSlct High
T56
0 nsec
0 nsec
0 nsec
100 nsec
70 nsec
0 nsec
60 nsec
60 nsec
70 nsec
72 nsec
17 nsec
39 nsec
122 nsec
17 nsec
89 nsec
50 nsec
5.0 µsec
25 nsec
10 nsec
20 nsec
150 nsec
35 nsec
7 nsec
19 nsec
2 nsec
7 nsec
79 nsec
3 nsec
42 nsec
7 nsec
71 nsec
2 nsec
7 nsec
129 nsec
3 nsec
92 nsec
1 nsec
4 nsec
1 nsec
3 nsec
1 nsec
4 nsec
Note 1 Performance figures and timing information valid at Fclk = 20.0 MHz only. For timing
information and performance parameters at Fclk < 20.0 MHz, refer to section 7.1.
Note 2 The clock low/high split has an allowable range of 45-55%.
MC3510 Technical Specifications
17