S1X60000 Datasheet, PDF (43/358 Pages) Epson Company – EMBEDDED ARRAY

Chapter 4 Types of Input/Output Buffers and Their Use (X Type)
4.2.4 Fail-Safe Cells
4.2.4.1 Overview
The S1X60000 series (X type) Fail-Safe cells allow signals above the power supply voltage
to be interfaced, even while power is supplied.
Furthermore, no leakage current flows in those cells, despite the fact that the signals are
interfaced while the power is cut off. Therefore, they provide greater freedom of design than
ever before.
(In dual-power supply systems, these are used as LVDD system cells.)
4.2.4.2 Features
(1) The Fail-Safe cells can be positioned as desired by customers.
(2) Even when input signals above the power supply voltage are applied while power is
supplied, no input leakage current flows. (For input buffers or bi-directional buffers
with pull-up resistors, however, a small input leakage current of approximately 30 µA
may flow due to their circuit configuration.)
(3) Even when input signals are applied from the outside while the power is cut off, no
input leakage current flows.
(4) Fail-Safe cells with two different input levels, the CMOS level and the CMOS Schmitt
level, are available.
(5) Because the Fail-Safe cells are completely CMOS structured, the power consumption
can be suppressed to a minimum.
4.2.4.3 Usage Precautions
(1) About input I/O cells
• For input buffers without resistors or with pull-down resistors, ordinary input
buffers may be used directly as Fail-Safe cells.
• If input buffers with pull-up resistors are needed, always be sure to use Fail-Safe
cells (however, a small input leakage current of approximately 30 µA may flow due
to their circuit configuration).
(2) About output I/O cells
• Provided that the output buffers are placed in High-Z state or the bi-directional
buffers are placed in input mode, no input leakage current may flow even when
input signals above the power supply voltage are applied while power is supplied.
• If signals above the power supply voltage are applied while the bi-directional buffers
are placed in output mode, an input leakage current flows as in ordinary
input/output buffers. The same applies when pull-up resistors above the power
supply voltage exist outside the chip.
(If a High logic level above the power supply voltage is needed, use open drain type
input/output buffers, with pull-up resistors added external to the chip in order to
pull-up the logic level High.)
34
EPSON
EMBEDDED ARRAY S1X60000 SERIES
DESIGN GUIDE