S1X60000 Datasheet, PDF (258/358 Pages) Epson Company – EMBEDDED ARRAY

Chapter 10 Circuit Design that Takes Testability into Account
• When MBIST_EN, MBIST_GO, and MBIST_DONE are used as dedicated pins
MBIST_EN
Input
Buffer
imbist_en
Output
Buffer
Output
MBIST_DONE
MBIST_GO
Buffer
• When MBIST_EN is used as a dedicated pin and MBIST_GO and MBIST_DONE are used as
shared pins
MBIST_EN
Input
Buffer
imbist_en
MUX
Output
Buffer
Output
MBIST_DONE
MUX
MBIST_GO
Buffer
Figure 10-14 Image of a Circuit Description
(3) Memory clocks integrated into one line for the purpose of BIST
If the circuit uses multiple memory clocks and is configured so as to integrate those
clocks into one line for operation in memory BIST mode, please notify Epson to that
effect. In addition, provide detailed information on it in (5) and (6) below.
(4) Clocks for multi-port memory multiplexed for the purpose of BIST
If the circuit has multi-port memory, it is necessary that clocks for the respective ports
be equal; otherwise, the clocks must be multiplexed for operation in memory BIST
mode. If you’ve multiplexed these clocks, please notify Epson to that effect. In addition,
provide detailed information on it in (5) and (6) below.
(5) SRAM information
Provide information on the SRAM as shown in the checksheet description examples
below.
(6) Test pin information
Provide information on the test pin as shown in the checksheet description example
below.
EMBEDDED ARRAY S1X60000 SERIES
DESIGN GUIDE
EPSON
249