S1X60000 Datasheet, PDF (235/358 Pages) Epson Company – EMBEDDED ARRAY

Chapter 10 Circuit Design that Takes Testability into Account
10.3.1 Configuration of Test Circuits
Figure 10-1 shows the configuration of the test-mode control circuit “TCIR2” recommended
by Epson.
Figure 10-2 shows a typical test circuit with a test mode control circuit “TCIR2” and a 2
word × 2 bit (this configuration is for illustrative purpose only) RAM test circuit. Refer to
these circuits and (1) through (4) below when configuring a test circuit. If RAM or
functional cells are included in your circuit, also refer to Section 10.4, “Memory Block Test
Circuits,” and Section 10.6, “Function Cell Test Circuits.”
(1) Adding and selecting pins for testing
To configure pins for testing, add the four types of test pins specified below.
For these test pins, select appropriate cells or buffers available.
• Test enable input pin
: 1 pin
• Test mode select input pin
: 4 pins
• Monitor output pin for AC testing: 1 pin
• Monitor output pin for DC testing: 1 pin
Test Pin Type
Test enable input
pin
Test mode select
input pin
Monitor output pin
for AC testing
Monitor output pin
for DC testing
Output and
input/output pins
Table 10-1 Test Pins Constraints
Number of
Pins
1 pin
4 pins
1 pin
1 pin
—
Name of Pins
(ex.)
Constraints, Notes, etc.
TSTEN
Dedicated input pin. Use ITST1 for the input buffer.
H: test mode; L: normal mode
INP0 to INP3
Input pin shareable with the user functions, but
cannot be shared with bi-directional pins. Avoid
sharing this pin with other input pins that have a
critical path.
OUT3
Input pin shareable with the user functions, but
cannot be shared with N-channel open drain cells.
Type S and Type M are not available.
OUT4
Input shareable with the user functions, but cannot
be shared with bidirectional, 3-state terminal or
N-channel open drain pins.
—
Output buffer with test mode (bi-directional buffer
used)
• DC testing
This test checks whether all input and output pins satisfy the designated
specifications for DC characteristics. If no test circuits are included, customers will
be requested to create test patterns to enable measurement of DC characteristics,
which may require a huge number of man-hours. Use of a test circuit facilitates the
creation of test patterns and therefore makes it easy to measure DC characteristics.
• AC testing
This test involves measuring pin to pin delays (delays in input pins to output pins).
If the actual operating frequency cannot be inspected using an LSI tester, the
operating speed will be guaranteed by measuring the delay in a specific path. If the
Epson-recommended test circuit “TCIR2” is used, variations between lots will be
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EPSON
EMBEDDED ARRAY S1X60000 SERIES
DESIGN GUIDE