DA9063_17 Datasheet, PDF (97/219 Pages) Dialog Semiconductor – System PMIC for Mobile Application Processors

DA9063
System PMIC for Mobile Application Processors
6.10 DC/DC Buck Converters
DA9063 includes six DC/DC buck converters with DVC.
VDD ( 2.8 ... 5.5 V)
DCDC CONVERTER
(3 MHz )
Isense
DRV
1.0 uH
VBUCK
CNTRL
SLEEP _ EN
V FB
DAC
CTRL
REF
POWER-EN
C _OUT
Figure 32: DC-DC Buck Converter
The converters are high efficiency synchronous step-down regulators, operating at a high frequency
(3 MHz), supplying individual output voltages with ± 3 % accuracy. The default output voltage is
loaded from OTP and can be set in 10 mV steps. To limit in-rush current from V_SYS, the buck
converters perform a soft-start for up to 3 ms, when enabled via control SOFT_START. During this
3 ms period, the output current of the buck is limited.
The DVC controller allows the following features:
● The buck converter output voltage is programmable over the power manager bus in 10 mV steps.
● If the feedback port GP_FB1 is configured as READY, this port is asserted while slewing and
asserts E_DVC_RDY after all voltage and buck regulators have stopped slewing.
● Output voltages below 0.7 V are only supported in Pulse Frequency Modulation (PFM) mode.
During a voltage reduction below 0.7 V, the slew rate control ends at 0.7 V and the buck mode is
automatically changed to PFM mode.
The DVC control is handled by the following registers:
● Output voltage setting register VBxxxx_A/VBxxxx_B.
When writing to the voltage control register that is in use by an enabled buck, the output
immediately ramps to the new setting. When writing to the voltage control register that is not in
use, the ramping is delayed until this register is selected by toggling VBxxxx_SEL.
● The voltage register selection VBxxxx_SEL.
This activates a pre-configured transition to the alternate output voltage. These controls are
grouped into registers DVC_1 and DVC_2 to better enable synchronized ramping of supply
voltages.
● The DVC slew rate is programmable as at 10 mV per (4, 2, 1, or 0.5) µs via control SLEW_RATE.
During PFM mode, the negative slew rate is load-dependent and might be lower than the
programmed rate.
The supply current during PWM (synchronous) operation is in the order of 3.5 mA (quiescent current
and charge/discharge current) and drops to <1 µA in shutdown. Switching frequency is chosen to be
high enough (3 MHz) to allow the use of a small 1.0 µH inductor.
The operating mode of the buck converter is selected via the buck control register bits B<x>_MODE.
The buck converter can be forced to operate in either PWM or PFM mode. Additionally, the buck
converter has an automatic mode where it switches between PWM and PFM modes depending on
the load current.
Datasheet
CFR0011-120-00
DA9063_2v1
97 of 219
23-Mar-2017
© 2017 Dialog Semiconductor