DS8007 Datasheet, PDF (14/41 Pages) Dallas Semiconductor – Multiprotocol Dual Smart Card Interface

Multiprotocol Dual Smart Card Interface
CS
RD
WR
AD3–AD0
0
REGISTERS
D7–D0
ALE
LATCH
1
D3–D0
V_DD
CS
LOGIC
RST
CONTROL
RST
OR
Figure 7. Parallel Bus Interface
Multiplexed Mode
In the multiplexed mode of operation, the D7–D0 sig-
nals are multiplexed between address and data. The
falling edge of the address latch enable (ALE) signal
from the host microcontroller latches the address
(D3–D0), and the RD and WR strobe input signals are
used to enable a read or write operation, respectively, if
the DS8007 is selected (i.e., CS = 0). See the AC timing
for the multiplexed parallel bus mode found earlier in
this data sheet.
Nomultiplexed Mode
In the nonmultiplexed mode of operation, the address is
always provided on the AD3–AD0 signals, and the data
is always transacted on the D7–D0 signals. The RD input
signal is used as a read/write (R/W) operation select. The
WR and CS input signals serve as active-low enables,
and must be asserted for the read or write operation to
take place. See the AC timing for the nonmultiplexed
parallel bus mode found earlier in this data sheet.
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