S6E2H4 Datasheet, PDF (95/160 Pages) SPANSION – fpu built-in

S6E2H4 Series
Multiplexed Bus Access Synchronous SRAM Mode
Parameter
MALE delay time
Symbol
tCHAL
tCHAH
Pin Name
MCLK,
ALE
MCLK↑→
Multiplexed address delay time
tCHMADV
MCLK↑→
Multiplexed data output time
tCHMADX
MCLK,
MADATA[15:0]
Conditions
VCC ≥ 4.5 V
VCC < 4.5 V
VCC ≥ 4.5 V
VCC < 4.5 V
VCC ≥ 4.5 V
VCC < 4.5 V
VCC ≥ 4.5 V
VCC < 4.5 V
Note:
− When the external load capacitance CL = 30 pF
(VCC = 2.7V to 5.5V, VSS = 0V)
Value
Min
Max
Unit Remarks
1
9
ns
12
ns
1
9
ns
12
ns
1
tOD
ns
1
tOD
ns
MCLK
MCSX[7:0]
MALE
MAD [24:0]
MOEX
MDQM [1:0]
MWEX
MADATA[15:0]
Document Number: 001-98941 Rev.*B
Page 95 of 160