S6E2H4 Datasheet, PDF (9/160 Pages) SPANSION – fpu built-in

3. Pin Assignment
LQH080
(TOP VIEW)
S6E2H4 Series
VCC 1
P50/CTS4_0/RTO10_0/AIN0_2/INT00_0/MADATA00_0 2
P51/RTS4_0/RTO11_0/BIN0_2/INT01_0/MADATA01_0 3
P52/SCK4_0/RTO12_0/ZIN0_2/MADATA02_0 4
P53/SOT4_0/RTO13_0/TIOA1_2/MADATA03_0 5
P54/SIN4_0/RTO14_0/TIOB1_2/INT02_0/MADATA04_0 6
P55/ADTG_1/SIN6_0/RTO15_0/INT07_2/MADATA05_0 7
P56/SOT6_0/DTTI1X_0/INT08_2/MADATA06_0 8
P30/RTS4_2/RTO25_1/TIOB0_1/INT15_2/WKUP1/MADATA07_0 9
P31/SIN3_1/DTTI2X_1/TIOB1_1/INT09_2/MADATA08_0 10
P32/SOT3_1/TIOB2_1/INT10_1/MADATA09_0 11
P33/ADTG_6/SCK3_1/TIOB3_1/INT04_0/MADATA10_0 12
P39/ADTG_2/DTTI0X_0/RTCCO_2/SUBOUT_2 13
P3A/RTO00_0/TIOA0_1/AIN0_0 14
P3B/RTO01_0/TIOA1_1/BIN0_0 15
P3C/RTO02_0/TIOA2_1/ZIN0_0 16
P3D/RTO03_0/TIOA3_1/MAD00_0 17
P3E/RTO04_0/TIOA4_1/MAD01_0 18
P3F/RTO05_0/TIOA5_1/MAD02_0 19
VSS 20
LQFP - 80
60 VSS
59 P21/AN17/SIN0_0/RTO24_0/INT06_1
58 P22/AN16/SOT0_0/RTO23_0/TIOB7_1/CROUT_0
57 P23/AN15/SCK0_0/RTO00_1/TIOA7_1
56 P1B/AN11/SCK4_1/IC02_1/MAD18_0
55 P1A/AN10/SOT4_1/IC01_1/MAD17_0
54 P19/AN09/SIN4_1/IC00_1/INT05_1/MAD16_0
53 P18/AN08/SCK2_2/DTTI2X_0/MAD15_0
52 AVRH
51 AVRL
50 AVSS
49 AVCC
48 P17/AN07/SOT2_2/RTO20_0/AIN2_2/WKUP3/MAD14_0
47 P16/AN06/SIN2_2/RTO21_0/BIN2_2/INT14_1/MAD13_0
46 P15/AN05/SCK0_1/RTO22_0/ZIN2_2/MAD12_0
45 P14/AN04/SOT0_1/IC03_2/MAD11_0
44 P13/AN03/SIN0_1/IC02_2/INT03_1/MAD10_0
43 P12/AN02/SCK1_1/IC01_2/MAD09_0/RTCCO_1/SUBOUT_1
42 P11/AN01/SOT1_1/TX1_2/IC00_2/MAD08_0
41 P10/AN00/SIN1_1/RX1_2/FRCK0_2/INT02_1/MAD07_0
Note:
− The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated port number. For these
pins, there are multiple pins that provide the same function for the same channel. Use the extended port function register
(EPFR) to select the pin.
Document Number: 001-98941 Rev.*B
Page 9 of 160