LUPA-1300_09 Datasheet, PDF (18/32 Pages) Cypress Semiconductor – 1.3MPxl High Speed CMOS Image Sensor

LUPA-1300
Once the information of the selected line is stable the
addressing of the pixels can start. This is done by means of a
Sync_x and a Clock_x pulse in the same way as the
Y-addressing. The Sync_x pulse downloads the address in the
address register into the shift register and connects the first
block of 16 columns to the 16 outputs.
In fact on chip is a 32-output bus instead of 16, but on the rising
edge of Clock_x the first 16 columns of the bus are connected
to the output stages. On the falling edge of Clock_x, the last
16 columns of the selected bus are connected to the output
stages.
The timing of the x-shift register is comparable with the timing
of the y-shift register, only that the timing is much faster. Again
the synchronization pulse must be high on the rising edge of
Clock_x.
Reduced Row Overhead Time timing
The row overhead time is the time between the selection of
lines that one has to wait to get the data stable at the column
amplifiers.
This row overhead time is a loss in time, which should be
reduced as much as possible.
Reduced timing
A straightforward way of reducing the R.O.T is by using a
sample and hold function.
By means of Sh_col the analog data is tracked during the first
200 nsec during the selection of a new set of lines. After 200
nsec, the analog data is stored. The ROT is in this case
reduced to 200 nsec, but as the internal data was not stable
yet dynamic range is lost because not the complete analog
levels are reached yet after 200ns.
Figure 16 shows this principle. Sh_col is now a pulse of
100ns-200ns starting 25 ns after Norowsel. The duration of
Sh_col is equal to the ROT. The shorter this time the shorter
the ROT will be however this lowers also the dynamic range.
Figure 16. Reduced standard ROT by means of Sh_col signal. pre_col (short pulse), Norowsel (short pulse) and Sh_col
(large pulse).
Document Number: 38-05711 Rev. *C
Page 18 of 32
[+] Feedback