STC4130 Datasheet, PDF (34/44 Pages) List of Unclassifed Manufacturers – Synchronous Clock for SETS

Mode control bits for T4.
STC4130
Synchronous Clock for SETS
Data Sheet
Bit 0: 0 = Arbitrary (use initial phase), 1 = Phase align
Bit 2, Accu_Usage: 0 = Device calculated long term history (LTH) is used; 1 = User supplied history is used.
Bit 5, OOP: In manual mode, when the selected active reference is out of the pull-in range, as specified in reg-
ister Disqualification_Range, 0x10, OOP will determine if the reference is to be followed, 0 = Don’t follow, 1 =
Follow.
Default value: 0.
T4_Bandwidth, 0x3a (R/W)
Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
0x3a
Not used
Sets the T4 bandwidth:
Default value: 0.
T4_Auto_Active_Ref, 0x3b (R)
0x1d, bits 4 ~ 0
0
1
2
3
4
5
6
7
8
9
10
31 ~ 11
Bandwidth, Hz
107
50
24
12
5.9
2.9
1.5
.73
0.37
0.18
0.09
Reserved
Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
0x3b
Not used
Indicates the automatic selected active reference for T4.
Values from 0 - 12
T4_Manual_Active_Ref, 0x3c (R/W)
Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
0x3c
Not used
Values from 0 - 15
Selects the active reference and the phase align mode for T4 in manual reference select mode.
Bit 3 ~ Bit 0
0000
0001 ~ 1100
Phase Align Mode/Ref selection
Freerun
Ref 1 ~ Ref 12
Data Sheet #: TM084 Page 34 of 44 Rev: P02 Date: 12/5/06
© Copyright 2006 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice