STC4130 Datasheet, PDF (33/44 Pages) List of Unclassifed Manufacturers – Synchronous Clock for SETS

T0_Priority_Table, 0x31 (R/W)
STC4130
Synchronous Clock for SETS
Data Sheet
Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
0x31
Ref 2 Priority
Ref 1 Priority
0x32
Ref 4 Priority
Ref 3 Priority
0x33
Ref 6 Priority
Ref 5 Priority
0x34
Ref 8 Priority
Ref 7 Priority
0x35
Ref 10 Priority
Ref 9 Priority
0x36
Ref 12 Priority
Ref 11 Priority
Reference priority for automatic reference selection mode. Lower values have higher priority:
Default value: 0.
T0_PLL_Status, 0x37 (R)
0x31 - 0x36, 4 bits
0000
0001 ~ 1111
Reference Priority
Disable reference
1 ~ 15
Address
0x37
Bit7
LHA
1=Available
0=Not
available
Bit6
LHC
1=Com-
plete
0=Not com-
plete
Bit5
Bit4
Reserved
SYNC: Indicates synchronization has been achieved
LOS: Loss of signal
LOL: Loss of lock
OOP: Out of pull-in range
LHC: Long Term History Complete
LHA: Long Term History Available
Bit3
OOP
1=Out of
pull-in
range
0=In range
Bit2
LOL
0=No LOL
1=LOL
Bit1
LOS
0=No LOS
1=LOS
Bit0
SYNC:
0=No Sync
1=Sync
T0_Accu_Flush, 0x38 (W)
Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
0x38
Not used
HO flush
Writing to this register will perform a flush of the accumulated history. The value of bit zero determines which
histories are flushed. Bit 0 = 0, Flush T0 current history only; bit 0 = 1, flush all T0 histories.
T4_Control_Mode, 0x39 (R/W)
Address
0x39
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Not used
OOP: Out
of Pull-in
range:
0=Follow
1=Don’t fol-
low
Manual/
Auto
0=Manual
1=Auto
Revertive
0=Non-
revertive
1=Rever-
tive
Accu_Usage
0=LTH
1=User
Phase
Align Mode
0=Arbitrary
1=Align
Data Sheet #: TM084 Page 33 of 44 Rev: P02 Date: 12/5/06
© Copyright 2006 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice