STC4130 Datasheet, PDF (29/44 Pages) List of Unclassifed Manufacturers – Synchronous Clock for SETS

Qualification_Range, 0x12 (R/W)
STC4130
Synchronous Clock for SETS
Data Sheet
Address
Bit7
Bit6
Bit5
Bit4
Bit3
0x12
Lower 8 bits
0x13
Not used
Reference qualification range, from 0 to +102.3 ppm, in 0.1 ppm steps.
Default value: 100.
Bit2
Bit1
Bit0
Upper 3 bits
Qualification_Timer, 0x14 (R/W)
Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
0x14
Reference qualification timer, from 0 to 255 S.
Default value: 10.
0 ~ 63 S
Ref_Selector, 0x15 (R/W)
Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
0x15
Not used
1 ~ 12 (0x1 ~ 0xc)
Determines which reference data is displayed in register 0x16 and 0x17. Valid values from 1 to 12.
Default value: 1.
Ref_Frq_Offset, 0x16 (R)
Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
0x16
Lower 8 bits of frequency offset
0x17
Not used
Reference frequency
Upper 4 bits of frequency offset
Displays the frequency offset and reference frequency for the reference selected by the Ref_Selector (0x15)
register. Frequency offset is from -204.8 to +204.7 ppm in 0.1 ppm steps, two’s complement. The reference fre-
quency is determined as follows:
0x13, bits 6 ~ 4
Frequency
000
No signal
001
8 KHz
010
64 KHz
011
1.544 MHz
100
2.048 MHz
101
19.44 MHz
110
38.88 MHz
111
77.76 MHz
Refs_Activity, 0x18 (R)
Address
0x18
0x19
Bit7
Bit6
Ref 8
Ref 7
Not used
Bit5
Bit4
Ref 6
Ref 5
T4_Xsync_In T0_Xsync_In
Bit3
Ref 4
Ref 12
Bit2
Ref 3
Ref 11
Bit1
Ref 2
Ref 10
Bit0
Ref 1
Ref 9
Data Sheet #: TM084 Page 29 of 44 Rev: P02 Date: 12/5/06
© Copyright 2006 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice