EP9315 Datasheet, PDF (47/64 Pages) Cirrus Logic – Enhanced Universal Platform System-on-Chip Processor

EP9315
Enhanced Universal Platform SOC Processor
Audio Interface
The following table contains the values for the timings of each of the SPI modes.
Parameter
SCLK cycle time
SCLK high time
SCLK low time
SCLK rise/fall time
Data from master valid delay time
Data from master setup time
Data from master hold time
Data from slave setup time
Data from slave hold time
Symbol
t_{clk_per}
t_{clk_high}
t_{clk_low}
t_clkrf
t_DMd
t_DMs
t_DMh
t_DSs
t_DSh
Min
Typ
-
tspix_clk
-
(tspix_clk) / 2
-
(tspix_clk) / 2
1
-
-
-
20
-
40
-
20
-
40
-
Max
-
-
-
8
3
-
-
-
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note: The tspix_clk is programmable by the user.
DS638PP4
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