EP9315 Datasheet, PDF (20/64 Pages) Cirrus Logic – Enhanced Universal Platform System-on-Chip Processor

EP9315
Enhanced Universal Platform SOC Processor
Static Memory Single Word Write Cycle
Parameter
AD setup to WRn assert time
AD hold from WRn deassert time
WRn deassert to CSn deassert time
CSn to WRn assert delay time
WRn assert time
CSn to DQMn assert delay time
WRn deassert to DA transition time
WRn assert to DA valid
Symbol
t_ADs
t_ADh
t_CSh
t_WRd
t_WRpw
t_DQMd
t_DAh
t_DAV
Min
- t_HCLK 3
t_HCLK × 2
7
-
-
-
t_HCLK
-
Typ
-
-
-
-
t_HCLK × (WST1 + 1)
-
-
-
Max
-
-
-
2
-
1
-
8
Unit
ns
ns
ns
ns
ns
ns
ns
ns
AD
CSn
WRn
RDn
DQMn
DA
WAIT
t_ADs
t_WRd
t_WRpw
t_CSh
t_DQMd
t_DAV
t_ADh
t_DAh
Figure 7. Static Memory Single Word Write Cycle Timing Measurement
20
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