EP7309_05 Datasheet, PDF (47/51 Pages) Cirrus Logic – High-performance, Low-power, System-on-chip with Enhanced Digital Audio Interface

EP7309
High-Performance, Low-Power System on Chip
Table 22. JTAG Boundary Scan Signal Ordering (Continued)
LQFP TFBGA PBGA
Pin No. Ball
Ball
Signal
Type Position
201
A7
D6
202
B7
B4
204
C7
E6
205
A6
A3
206
B6
D5
207
C6
B3
208
A5
A2
nMWE
nMOE
nCS[0]
nCS[1]
nCS[2]
nCS[3]
nCS[4]
O
358
O
360
O
362
O
364
O
366
O
368
O
370
1) See EP7309 Users’ Manual for pin naming / functionality.
2) For each pad, the JTAG connection ordering is input,
output, then enable as applicable.
DS507F1
©Copyright Cirrus Logic, Inc. 2005
(All Rights Reserved)
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