EP7309_05 Datasheet, PDF (42/51 Pages) Cirrus Logic – High-performance, Low-power, System-on-chip with Enhanced Digital Audio Interface

EP7309
High-Performance, Low-Power System on Chip
Table 21. 256-Ball PBGA Ball Listing (Continued)
Ball Location
P6
P7
P8
P9
P10
P11
P12
P13
P14
P15
P16
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
R11
R12
R13
R14
R15
R16
T1
T2
T3
T4
T5
T6
T7
T8
T9
T10
T11
T12
T13
T14
T15
T16
Name
VSSIO
VSSIO
VDDIO
VSSIO
VDDIO
VSSIO
VSSIO
VDDIO
VSSIO
D[24]
VDDIO
RTCIN
VDDIO
PD[4]
PD[1]
SSITXDA
nADCCS
VDDIO
ADCOUT
COL[7]
COL[3]
COL[1]
D[30]
A[27]
A[25]
VDDIO
A[24]
VDDRTC
PD[7]
PD[6]
PD[3]
SSICLK
SSIRXFR
VDDCORE
DRIVE[0]
FB[1]
COL[5]
VDDIO
BUZ
D[28]
A[26]
D[25]
VSSIO
Type
Description
Pad ground I/O ground
Pad ground I/O ground
Pad power Digital I/O power, 3.3V
Pad ground I/O ground
Pad power Digital I/O power, 3.3V
Pad ground I/O ground
Pad ground I/O ground
Pad power Digital I/O power
Pad ground I/O ground
I/O
Data I/O
Pad power Digital I/O power, 3.3V
I/O
Real time clock oscillator input
Pad power Digital I/O power, 3.3V
I/O
GPIO port D
I/O
GPIO port D
O
DAI/CODEC/SSI2 serial data output
O
SSI1 ADC chip select
Pad power Digital I/O power, 3.3V
O
SSI1 ADC serial data output
O
Keyboard scanner column drive
O
Keyboard scanner column drive
O
Keyboard scanner column drive
I/O
Data I/O
O
System byte address
O
System byte address
Pad power Digital I/O power, 3.3V
O
System byte address
RTC power Real time clock power, 2.5V
I/O
GPIO port D
I/O
GPIO port D
I/O
GPIO port D
I/O
DAI/CODEC/SSI2 serial clock
–
DAI/CODEC/SSI2 frame sync
Core power Core power, 2.5V
I/O
PWM drive output
I
PWM feedback input
O
Keyboard scanner column drive
Pad power Digital I/O power, 3.3V
O
Buzzer drive output
I/O
Data I/O
O
System byte address
I/O
Data I/O
Pad ground I/O ground
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(All Rights Reserved)
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