CS4245 Datasheet, PDF (33/54 Pages) Cirrus Logic – 105 dB, 24-Bit, 192 kHz Streo Sudio CODEC

CS4245
The auxiliary analog output can source very little current. As current from the AUXOUT pins increases, distortion will
increase. For this reason, a high input impedance buffer must be used on the AUXOUT pins to achieve full perfor-
mance. Refer to the Auxiliary Output Analog Characteristics table on page 18 for acceptable loading conditions.
4.9 De-Emphasis Filter
The CS4245 includes on-chip digital de-emphasis optimized for a sample rate of 44.1 kHz. The filter response is
shown in Figure 15. The frequency response of the de-emphasis curve will scale proportionally with changes in sam-
ple rate, Fs. Please see section 6.3.4 for de-emphasis control.
The de-emphasis feature is included to accommodate audio recordings that utilize 50/15 µs pre-emphasis equaliza-
tion as a means of noise reduction.
De-emphasis is only available in Single Speed Mode.
Gain
dB
0dB
T1=50 µs
-10dB
T2 = 15 µs
F1
3.183 kHz
F2 Frequency
10.61 kHz
Figure 15. De-Emphasis Curve
4.10 Internal Digital Loopback
The CS4245 supports an internal digital loopback mode in which the output of the ADC is routed to the input of the
DAC. This mode may be activated by setting the LOOP bit in the Signal Selection register (06h - See page 43). To
use this mode, the ADC and DAC must be operating at the same synchronous sample rate.
When this bit is set, the status of the DAC_DIF[1:0] bits in register 03h will be disregarded by the CS4245. Any
changes made to the DAC_DIF[1:0] bits while the LOOP bit is set will have no impact on operation until the LOOP
bit is cleared, at which time the Digital Interface Format of the DAC will operate according to the format selected by
the DAC_DIF[1:0] bits. While the LOOP bit is set, data will be present on the SDOUT pin in the format selected by
the ADC_DIF bit in register 04h.
4.11 Mute Control
The MUTEC pin becomes active during power-up initialization, reset, muting, if the MCLK2 to LRCK2 ratio is incor-
rect in asynchronous mode or the MCLK1 to LRCK2 ratio is incorrect in synchronous mode, and during power-down.
The MUTEC pin is intended to be used as control for an external mute circuit in order to add off-chip mute capability.
Use of the Mute Control function is not mandatory but recommended for designs requiring the absolute minimum in
extraneous clicks and pops. Also, use of the Mute Control function can enable the system designer to achieve idle
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