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CS42L51_07 Datasheet, PDF (28/88 Pages) Cirrus Logic – Low Power, Stereo CODEC with Headphone Amp
CS42L51
4.3 Analog Inputs
AINxA and AINxB are the analog inputs, internally biased to VQ, that accepts line-level and MIC-level sig-
nals, allowing various gain and signal adjustments for each channel.
MUX
DIGMIX
MUX
MUX
MICMIX
MUX
ADCA_MUTE
ADCA_DBOOST
ADCA_ATT[7:0]
0/-96dB
1dB steps
+20dB
Digital
Boost
Attenuator
ADCA_HPF FREEZE
ADCA_HPF ENABLE
SOFTA
ALCA_SRDIS
ALCA_ZCDIS
ALC_ENA
Σ
ALC_ARATE[5:0]
ALC_RRATE[5:0]
MAX[2:0]
MIN[2:0]
ALC
ALC_ENB
ALCB_SRDIS
ALCB_ZCDIS
PDN_ADCA
Multibit
Oversampling
ADC
INV_ADCA
Noise Gate
NG_ALL
NG_EN
THRESH[3:0]
NGDELAY[1:0]
ADCB_DBOOST
SOFTB
PDN_ADCB
ADCB_HPF FREEZE
ADCB_HPF ENABLE
+20dB
Digital
Boost
Attenuator
ADCB_MUTE
ADCB_ATT[7:0]
0/-96dB
1dB steps
Multibit
Oversampling
ADC
INV_ADCB
TO SIGNAL PROCESSING
ENGINE (SPE)
FROM SIGNAL
PROCESSING ENGINE
(SPE)
Figure 8. Analog Input Architecture
PGAA_VOL[5:0]
ADC_SNGVOL
SOFTA
ZCROSSA
+12/-3dB
0.5dB steps
PGA
MUX
PDN_PGAA
AINA_MUX[1:0]
MICBIAS_LVL[1:0]
AIN1A
AIN2A
+16/
AIN3A/ MICIN1
32 dB
MICA_BOOST
PDN_MICA
MICBIAS
PDN_MICBIAS
PGAB_VOL[5:0]
ADC_SNGVOL
SOFTB
ZCROSSB
+12/-3dB
0.5dB steps
PGA
MUX
PDN_PGAB
AINB_MUX[1:0]
MICBIAS_SEL
AIN1B
AIN2B/MICBIAS
AIN3B/ MICIN2/
+16/
32 dB
MICBIAS
MICB_BOOST
PDN_MICB
4.3.1 Digital Code, Offset & DC Measurement
The ADC output data is in two’s complement binary format. For inputs above positive full scale or below
negative full scale, the ADC will output 7FFFFFH or 800000H, respectively and cause the ADC overflow
bit to be set to a ‘1’.
Given the two’s complement format, low-level signals may cause the MSB of the serial data to periodically
toggle between ‘1’ and ‘0’, possibly introducing noise into the system as the bit switches back and forth.
To prevent this phenomena, a constant DC offset is added to the serial data bringing the low-level signal
just above the point at which the MSB would normally toggle, thus reducing the noise introduced. Note
that this offset is not removed (refer to “Analog Input Characteristics (Commercial - CNZ)” on page 13
and/or “Analog Input Characteristics (Automotive - DNZ)” on page 14 for the specified offset level).
The CODEC may be used to measure DC voltages by disabling the high-pass filter for the designated
channel. DC levels are measured relative to VQ and will be decoded as positive two’s complement binary
numbers above VQ and negative two’s complement binary numbers below VQ.
Software
Controls:
“Status (Address 20h) (Read Only)” on page 73, “ADC Control (Address 06h)” on page 54.
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DS679F1