CS42L51_07 Datasheet, PDF (10/88 Pages) Cirrus Logic – Low Power, Stereo CODEC with Headphone Amp

2. TYPICAL CONNECTION DIAGRAMS
CS42L51
+1.8 V or +2.5 V
1 µF
0.1 µF
VD
0.1 µF
0.1 µF
VA
VA_HP
See Note 4
1 µF
+1.8 V or +2.5 V
Note 4:
Series resistance in the path of the power supplies must
be avoided. Any voltage drop on VA_HP will directly
impact the negative charge pump supply (VSS_HP) and
result in clipping on the audio output .
1.5 µF ^** 1 µF ^**
See Note 5
1.5 µF ^** 1 µF ^**
FLYP
FLYN
VSS_HP
GND_HP
AOUTB
AOUTA
0.022 µF
51.1 Ω
470 Ω
Headphone Out
Left & Right
* *Use low ESR ceramic capacitors.
Note 2 :
For best response to Fs/2 :
C
=
R_ext + 470
4πFs(R_ext × 470)
CS42L51
C
Rext
Line Level Out
Left & Right
C
See Note 2
Rext
470 Ω
This circuitry is intended for applications where the
CS42L51 connects directly to an unbalanced output of the
device. For internal routing applications please see the
DAC Analog Output Characteristics section for loading
limitations.
Speaker Driver
Note 5 :
Larger capacitors, such as 1.5 µF, improves the charge
pump performance (and subsequent THD+N) at the full
scale output power achieved with gain (G) settings
greater than default.
Digital Audio
Processor
2k Ω
+1.8 V, +2.5 V
or +3.3 V
See Note 1
Note 1:
Resistors are required for I²C
control port operation
2k Ω
0.1 µF
MCLK
SCLK
LRCK
SDIN
SDOUT
RESET
SCL/CCLK
SDA/CDIN
AD0/CS
VL
AIN1A
1800 pF * _{1 µF} ^{100 Ω}
Left Analog Input 1
100 kΩ
AIN1B
1800 pF *
100 Ω
1 µF
AIN2A
1800 pF * _{1 µF} ^{100 Ω}
100 kΩ
Right Analog Input 1
Left Analog Input 2
100 kΩ
AIN2B
BIAS1
1800 pF *
100 Ω
1 µF
MICIN1
AIN3A
1 µF
100 kΩ
100 kΩ
Right Analog Input 2
Microphone Input
BIAS2
AIN3B/MICIN2
0.1 µF
Microphone Bias
RL See Note 3
Note 3: The value of RL is dictated
by the microphone cartridge.
ADC_FILT+
DAC_FILT+
DGND
AGND
AFILTA
AFILTB
VQ
1 µF
*
*
150 pF
150 pF
10 µF
1 µF
* Capacitors must be C0G or equivalent
Figure 1. Typical Connection Diagram (Software Mode)
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