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CS42L51_07 Datasheet, PDF (19/88 Pages) Cirrus Logic – Low Power, Stereo CODEC with Headphone Amp
CS42L51
HEADPHONE OUTPUT POWER CHARACTERISTICS
Test conditions (unless otherwise specified): Input test signal is a full-scale 997 Hz sine wave; measurement band-
width is 10 Hz to 20 kHz; Sample Frequency = 48 kHz; test load RL = 16 Ω, CL = 10 pF (see Figure 3).
Parameter
AOUTx Power Into RL = 16 Ω
VA = 2.5V (nominal)
Min
Typ
Max
VA = 1.8V (nominal)
Min
Typ
Max Unit
HP_GAIN[2:0]
000
Analog
Gain (G)
0.3959
001
0.4571
010
0.5111
011 (default)
0.6047
100
0.7099
101
0.8399
110
1.0000
111
1.1430
VA_HP
1.8 V
2.5 V
1.8 V
2.5 V
1.8 V
2.5 V
1.8 V
2.5 V
1.8 V
2.5 V
1.8 V
2.5 V
1.8 V
2.5 V
1.8 V
2.5 V
-
14
-
-
-
14
-
-
-
19
-
-
-
19
-
-
-
23
-
-
-
23
-
-
(Note 11)
-
-
32
-
-
(Note 11)
-
-
44
-
-
-
(Note 9, 11)
7
-
mWrms
7
-
mWrms
10
-
mWrms
10
-
mWrms
12
-
mWrms
12
-
mWrms
17
-
mWrms
17
-
mWrms
23
-
mWrms
23
-
mWrms
(Note 9)
mWrms
32
-
mWrms
mWrms
mWrms
mWrms
mWrms
8. One-half LSB of triangular PDF dither is added to data.
9. Full-scale output voltage and power is determined by the gain setting, G, in register “Headphone Analog
Gain (HP_GAIN[2:0])” on page 57. High gain settings at certain VA and VA_HP supply levels may
cause clipping when the audio signal approaches full-scale, maximum power output, as shown in
Figures 27 - 30 on page 76.
10. See Figure 3. RL and CL reflect the recommended minimum resistance and maximum capacitance re-
quired for the internal op-amp's stability and signal integrity. In this circuit topology, CL will effectively
move the band-limiting pole of the amp in the output stage. Increasing this value beyond the recom-
mended 150 pF can cause the internal op-amp to become unstable.
11. VA_HP settings lower than VA reduces the headroom of the headphone amplifier. As a result, the DAC
may not achieve the full THD+N performance at full-scale output voltage and power.
AOUTx
51 Ω
0.022 µF
CL
RL
AGND
Figure 3. Headphone Output Test Load
DS679F1
19