CS2000-CP_15 Datasheet, PDF (13/37 Pages) Cirrus Logic – Fractional-N Clock Synthesizer & Clock Multiplier

CS2000-CP
Delta-Sigma Fractional-N Frequency Synthesizer
Timing Reference
Clock
Phase
Comparator
Internal
Loop Filter
Voltage Controlled
Oscillator
PLL Output
Fractional-N
Divider
Delta-Sigma
Modulator
Digital PLL and Fractional-N Logic ^N
Digital Filter
Frequency Reference
Clock
Frequency
Comparator for
Frac-N Generation
Output to Input Ratio for Hybrid mode
Figure 8. Hybrid Analog-Digital PLL
4.2.1
Fractional-N Source Selection for the Frequency Synthesizer
The fractional-N value for the frequency synthesizer can be sourced from either a static ratio or a dynamic
ratio generated from the digital PLL (see Figure 9). This allows for the selection between operating in the
static ratio based Frequency Synthesizer Mode as a simple frequency synthesizer (for frequency gener-
ation from the Timing Reference Clock) and in the dynamic ratio based Hybrid PLL Mode (for jitter reduc-
tion and clock multiplication). Selection between these two modes can either be made automatically
based on the presence of the Frequency Reference Clock or manually through register controls.
.
Timing Reference Clock
Fractional-N
Frequency Synthesizer
PLL Output
N
Output to Input Ratio for Synthesizer Mode
Frequency Reference Clock
Digital PLL & Fractional-N Logic
Output to Input ratio for Hybrid Mode
Figure 9. Fractional-N Source Selection Overview
DS761F3
13