CS4235 Datasheet, PDF (51/94 Pages) Cirrus Logic – CrystalClear Low Cost ISA Audio System

CS4235
CrystalClear ^TM Low Cost ISA Audio System
VCF1
VCIE
Hardware Volume Control Format.
This bit controls the format of the
UP, DOWN, and MUTE pins. VCF1
is initialized in the E²PROM Hard-
ware Configuration data, Global
Configuration byte.
0 - MUTE is a momentary button.
Pressing MUTE toggles between
mute and un-mute. Pressing UP or
DOWN will always un-mute.
1 - MUTE is not used. Pressing the
up and down buttons simultane-
ously causes the volume to mute.
Pressing up or down singularly will
un-mute.
Volume Control Interrupt Enable.
When set, the hardware volume
control pins cause interrupts, when
pressed, on the WSSint pin. The
status is available in CTRLbase+7,
IMV bit. The IMV bit is cleared by
reading CTRLbase+7.
Chip Version and ID (X25)
Default = 11011101
D7 D6 D5 D4 D3 D2 D1 D0
V2 V1 V0 CID4 CID3 CID2 CID1 CID0
CID5-CID0
Chip Identification. Distinguishes
between this chip and other codec
chips that support this register set.
This register is identical to C1 and
replaces the ID register in I25.
11101 - CS4235
V2-V0
Version Number. As enhancements
are made, the version number is
changed so software can distinguish
between the different versions of the
same chip.
100 - Revision A
101 - Revision B
110 - Revision C
Joystick Control (X26)
Default = xx0x0x01
D7 D6 D5
D4
rbc rbc CONSW rbc
D3 D2 D1 D0
ZERO rbc JR1 JR0
X26 and CTRLbase+0 access the same data with the
exception that the XTAL bit in CTRLbase is replaced
with ZERO in this register.
JR1,0
Joystick rate control. Selects operating
speed of the joystick (changes the
trigger threshold for the X/Y coordi-
nates).
00 - slowest speed
01 - medium slow speed
10 - medium fast speed
11 - fastest speed
ZERO
This bit MUST be written to 0. Writing
this bit to 1 will disable the entire
WSS register space.
CONSW
controls host interrupt generation
when a context switch occurs
0 - no interrupt on context switch
1 - Control interrupt generated on
context switch
E²PROM Interface (X27)
CTRLbase+1, Default = 1xxxx000
D7 D6 D5 D4 D3 D2 D1 D0
ICH rbc rbc
rbc
rbc DIN/ DOUT CLK
EEN
X27 and CTRLbase+1 access the same data.
CLK
This bit is used to generate the clock
for the Plug and Play E²PROM.
EEN must be set to 1 to make this
bit operational. A 1 sets the SCL pin
high and a 0 sets the SCL pin low.
DOUT
This bit is used to output serial data
to the Plug and Play E²PROM. EEN
must be set to 1 to make this bit op-
erational. A 0 causes SDA to go low.
A 1 releases SDA (open-drain).
DS252PP2
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