DDC112 Datasheet, PDF (3/24 Pages) Burr-Brown (TI) – Dual Current Input 20-Bit ANALOG-TO-DIGITAL CONVERTER

PIN CONFIGURATION
Top View
IN1 1
AGND 2
CAP1B 3
CAP1B 4
CAP1A 5
CAP1A 6
AV_DD 7
TEST 8
CONV 9
CLK 10
DCLK 11
DXMIT 12
DIN 13
DV_DD 14
DDC112
SO
28 IN2
27 AGND
26 CAP2B
25 CAP2B
24 CAP2A
23 CAP2A
22 V_REF
21 AGND
20 RANGE2 (MSB)
19 RANGE1
18 RANGE0 (LSB)
17 DVALID
16 DOUT
15 DGND
ABSOLUTE MAXIMUM RATINGS⁽¹⁾
AV_DD to DV_DD ....................................................................... –0.3V to +6V
AV_DD to AGND ..................................................................... –0.3V to +6V
DV_DD to DGND ..................................................................... –0.3V to +6V
AGND to DGND ............................................................................... ±0.3V
V_REF Voltage to AGND ............................................ –0.3V to AV_DD +0.3V
Digital Input Voltage to DGND ................................ –0.3V to DV_DD +0.3V
Digital Output Voltage to DGND ............................. –0.3V to DV_DD +0.3V
Package Power Dissipation ............................................. (T_JMAX – T_A)/θ_JA
Maximum Junction Temperature (T_JMAX) ...................................... +150°C
Thermal Resistance, θ_JA ............................................................. 150°C/W
Lead Temperature (soldering, 10s) ............................................... +300°C
NOTE: (1) Stresses above those listed under “Absolute Maximum Ratings”
may cause permanent damage to the device. Exposure to absolute maxi-
mum conditions for extended periods may affect device reliability.
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and
installation procedures can cause damage.
ESD damage can range from subtle performance degradation to
complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes
could cause the device not to meet its published specifications.
PIN DESCRIPTIONS
PIN LABEL DESCRIPTION
1
IN1 Input 1: analog input for Integrators 1A and 1B. The
integrator that is active is set by the CONV input.
2
AGND Analog Ground.
3
CAP1B External Capacitor for Integrator 1B.
4
CAP1B External Capacitor for Integrator 1B.
5
CAP1A External Capacitor for Integrator 1A.
6
CAP1A External Capacitor for Integrator 1A.
7
AV_DD Analog Supply, +5V nominal.
8
TEST Test Control Input. When HIGH, a test charge is
applied to the A or B integrators on the next CONV
transition.
9
CONV Controls which side of the integrator is connected to
input. In continuous mode; CONV HIGH → side A is
integrating, CONV LOW → side B is integrating.
CONV must be synchronized with CLK (see text).
10
CLK System Clock Input, 10MHz nominal.
11
DCLK Serial Data Clock Input. This input operates the
serial I/O shift register.
12
DXMIT Serial Data Transmit Enable Input. When LOW, this
input enables the internal serial shift register.
13
DIN Serial Digital Input. Used to cascade multiple
DDC112s.
14
DV_DD Digital Supply, +5V nominal.
15
DGND Digital Ground.
16
DOUT Serial Data Output, Hi-Z when DXMIT is HIGH.
17 DVALID Data Valid Output. A LOW value indicates valid data
is available in the serial I/O register.
18 RANGE0 Range Control Input 0 (least significant bit).
19 RANGE1 Range Control Input 1.
20 RANGE2 Range Control Input 2 (most significant bit).
21
AGND Analog Ground.
22
V_REF External Reference Input, +4.096V nominal.
23
CAP2A External Capacitor for Integrator 2A.
24
CAP2A External Capacitor for Integrator 2A.
25
CAP2B External Capacitor for Integrator 2B.
26
CAP2B External Capacitor for Integrator 2B.
27
AGND Analog Ground.
28
IN2 Input 2: analog input for Integrators 2A and 2B. The
integrator that is active is set by the CONV input.
The information provided herein is believed to be reliable; however, BURR-BROWN
assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no
responsibility for the use of this information, and all use of such information shall be
entirely at the user’s own risk. Prices and specifications are subject to change without
notice. No patent rights or licenses to any of the circuits described herein are implied or
granted to any third party. BURR-BROWN does not authorize or warrant any BURR-
BROWN product for use in life support devices and/or systems.
PACKAGE/ORDERING INFORMATION
PRODUCT
MAXIMUM
INTEGRAL
LINEARITY ERROR
SPECIFICATION
TEMPERATURE
RANGE
PACKAGE
PACKAGE
DRAWING
NUMBER
ORDERING
NUMBER⁽¹⁾
TRANSPORT
MEDIA
DDC112U
"
DDC112UK
"
±0.025% Reading ±1.0ppm% FSR
"
±0.025% Reading ±1.0ppm% FSR
"
–40°C to +85°C
"
0°C to +70°C
"
SO-28
"
SO-28
"
217
DDC112U
Rails
"
DDC112U/1K
Tape and Reel
217
DDC112UK
Rails
"
DDC112UK/1K
Tape and Reel
NOTES: (1) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /1K indicates 1000 devices per reel). Ordering 1000 pieces
of “DDC112U/1K” will get a single 1000-piece Tape and Reel.
®
3
DDC112